參數(shù)資料
型號: SST55LD040M-133-C-BZJE
元件分類: 存儲控制器/管理單元
英文描述: IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PBGA145
封裝: 12 X 12 MM, 1.07 MM HEIGHT, ROHS COMPLIANT, TFBGA-145
文件頁數(shù): 3/39頁
文件大?。?/td> 589K
代理商: SST55LD040M-133-C-BZJE
Advance Information
NAND Controller
SST55LD040M
2010 Silicon Storage Technology, Inc.
S71408-01-000
04/10
11
MANUFACTURING SUPPORT
The NAND Controller firmware contains a list of supported standard NAND flash media devices. Upon initial Power-on, the
controller scans all connected flash media devices and reads their device ID. If the device ID matches the listed flash media
devices in the NAND controller, the controller performs drive recognition based on the algorithm provided by the flash media
suppliers, including setting up the bad block table, executing all the necessary handshaking routines for flash media support,
and, finally, performing the low-level format. For Power-up timing specifications, please refer to Table 14.
Please contact SST for the most current list of supported NAND Flash media devices.
In the event that the NAND flash media device ID is not recognized by the NAND Controller, the user can add this device to
the controller device table through the manufacturing interface provided by SST. Please contact SST for the NAND Controller
manufacturing interface software. If the drive initialization fails, and a visual inspection is unable to determine the problem, the
SST55LD040M NAND Controller provides a comprehensive interface for manufacturing flow debug. This interface not only
allows debug of the failure and manual reset of the initialization process, but also allows customization of user definable
options.
ATA/IDE Host Interface
The NAND Controller ATA/IDE host interface can be used for manufacturing support. SST provides an example of a DOS-/
Windows-based solution (an executable routine downloadable from www.sst.com) for manufacturing debug and rework.
Serial Communication Interface (SCI)
For additional manufacturing flexibility, the SCI bus can report manufacturing errors. The SCI consists of 3 active signals:
SCIDOUT, SCIDIN, and SCICLK. The Serial Communication Interface (SCI) is designed to provide trace information during
the debugging process. To aid in validation, always provide the SCI access to PCB design.
CLOCK SELECTION
The NAND Controller defaults to the internal clock source when XCLKEN is not connected and XCLKI is connected to VSS.
The external clock interface allows NAND controller operation from an external clock source generated by an oscillator cir-
cuit. Contact SST for reference circuit and recommended external clock frequencies.
SECURITY FEATURES
The SST55LD040M NAND Controller offers added data protection for applications where data security is of the utmost
importance. The secure features are:
1. Protection zones - Customer can enable up to 4 independent protection zones, with two options: Read-only or
Hidden (Read and Write protected) within each protected zone. If protection zones are not enabled the data is
unprotected (default configuration).
2. Password protection - Accessing information within the protected zones can be only achieved through a
customer-unique password.
3. Security Purge command - The system can issue a Security Purge command to erase all information stored in
the flash media.
相關(guān)PDF資料
PDF描述
SST55VD020-60-C-MVWE IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PBGA85
SST55VD020-60-I-TQWE IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PQFP100
SST55VD020-60-C-MVWE IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PBGA85
SST55VD020-60-I-TQWE IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PQFP100
SST85LD0512-60-RI-LBTE IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PBGA91
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