參數(shù)資料
型號: SST55LD019A-45-C-TQP
廠商: SILICON STORAGE TECHNOLOGY INC
元件分類: 存儲控制器/管理單元
英文描述: FLASH MEMORY DRIVE CONTROLLER, PQFP64
封裝: MS-026ADC, TQFP-64
文件頁數(shù): 63/76頁
文件大?。?/td> 711K
代理商: SST55LD019A-45-C-TQP
66
Advance Information
ATA Flash Disk Controller
SST55LD019A / SST55LD019B / SST55LD019C
2004 Silicon Storage Technology, Inc.
S71241-02-000
4/04
12.2.2 Host Side Interface I/O Output (Write) Timing Specification
Note: The maximum load on IOCS16# is 1 LSTTL with 50pF total load.
All AC specifications are guaranteed by design.
FIGURE
12-3: HOST SIDE INTERFACE I/O WRITE TIMING DIAGRAM
TABLE
12-8: HOST SIDE INTERFACE I/O WRITE TIMING SPECIFICATION
Symbol
Parameter
Min
Max
Units
TSU (IOWR#)
Data Setup before IOWR#
20
-
ns
TH (IOWR#)
Data Hold following IOWR#
10
-
ns
TW (IOWR#)
IOWR# Width Time
70
-
ns
TSUA (IOWR#)
Address Setup before IOWR#
25
-
ns
THA (IOWR#)
Address Hold following IOWR#
10
-
ns
TDF IOCS16#(ADR)
IOCS16# Delay Falling from Address
-
20
ns
TDR IOCS16#(ADR)
IOCS16# Delay Rising from Address
-
20
ns
T12-8.0 1241
1241 F04.0
TDR IOCS16#(ADR)
TDF IOCS16#(ADR)
THA (IOWR#)
TH (IOWR#)
TSU (IOWR#)
DIN Valid
TSUA (IOWR#)
TW (IOWR#)
Valid Address1
IOWR#
IOCS16#
D15-D0
1. Valid Address consists of signals CS1FX#, CS3FX# and A2-A0.
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