參數(shù)資料
型號: SST55LD019A-45-C-TQP
廠商: SILICON STORAGE TECHNOLOGY INC
元件分類: 存儲控制器/管理單元
英文描述: FLASH MEMORY DRIVE CONTROLLER, PQFP64
封裝: MS-026ADC, TQFP-64
文件頁數(shù): 45/76頁
文件大?。?/td> 711K
代理商: SST55LD019A-45-C-TQP
Advance Information
ATA Flash Disk Controller
SST55LD019A / SST55LD019B / SST55LD019C
2004 Silicon Storage Technology, Inc.
S71241-02-000
4/04
5
1.0 GENERAL DESCRIPTION
The ATA Flash Disk Controller contains a microcontroller
and embedded flash file system integrated in TQFP and
TFBGA packages. Refer to Figure 2-1 for the ATA Flash
Disk Controller block diagram. The controller interfaces with
the host system allowing data to be written to and read
from the flash media.
1.1 Performance-optimized ATA Flash Disk
Controller
The heart of the flash drive is the ATA Flash Disk Controller
which translates standard ATA signals into flash media data
and control signals. The following components contribute to
the ATA Flash Disk Controller’s operation.
1.1.1 Microcontroller Unit (MCU)
The MCU translates ATA/IDE commands into data and
control signals required for flash media operation.
1.1.2 Internal Direct Memory Access (DMA)
The ATA Flash Disk Controller uses internal DMA allowing
instant data transfer from buffer to flash media. This imple-
mentation eliminates microcontroller overhead associated
with the traditional, firmware-based approach, thereby
increasing the data transfer rate.
1.1.3 Power Management Unit (PMU)
The power management unit controls the power consump-
tion of the ATA Flash Disk Controller. The PMU dramatically
reduces the power consumption of the ATA Flash Disk
Controller by putting the part of the circuitry that is not in
operation into sleep mode.
1.1.4 SRAM Buffer
A key contributor to the ATA Flash Disk Controller perfor-
mance is an SRAM buffer. The buffer optimizes the host’s
data transfer to and from the flash media.
1.1.5 Embedded Flash File System
The embedded flash file system is an integral part of the
ATA Flash Disk Controller. It contains MCU firmware that
performs the following tasks:
1. Translates host side signals into flash media
writes and reads.
2. Provides dynamic flash media wear leveling to
spread the flash writes across all unused memory
address space to increase the longevity of flash
media.
3. Keeps track of data file structures.
4. Manages system security for the selected
protection zones.
1.1.6 Error Correction Code (ECC)
The ATA Flash Disk Controller utilizes 72-bit Reed-
Solomon Error Detection Code (EDC) and Error Correc-
tion Code (ECC), which provides the following error
immunity for each 512-byte block of data:
1. Corrects up to three random 12-bit symbol errors.
2. Corrects single bursts up to 25 bits.
3. Detects single bursts up to 61 bits and double
bursts up to 15 bits.
4. Detects up to six random 12-bit symbol errors.
1.1.7 Serial Communication Interface (SCI)
The Serial Communication Interface (SCI) is designed to
enable the user to restart the self-initialization process and
to customize the drive identification information.
1.1.8 Multi-tasking Interface
The multi-tasking interface enables fast, sustained write
performance by allowing concurrent Read, Program, and
Erase operations to multiple flash media devices.
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