參數(shù)資料
型號: SST49LF004B-33-4C-NH
廠商: SILICON STORAGE TECHNOLOGY INC
元件分類: PROM
英文描述: 4 Mbit LPC Firmware Flash
中文描述: 512K X 8 FLASH 3V PROM, 11 ns, PQCC32
封裝: PLASTIC, MS-016AE, LCC-32
文件頁數(shù): 17/39頁
文件大?。?/td> 460K
代理商: SST49LF004B-33-4C-NH
Data Sheet
4 Mbit LPC Firmware Flash
SST49LF004B
17
2003 Silicon Storage Technology, Inc.
S71232-02-000
12/03
Multiple Device Selection
Multiple LPC flash devices may be strapped to increase
memory densities in a system. The four ID pins, ID[3:0],
allow up to 16 devices to be attached to the same bus by
using different ID strapping in a system. BIOS support, bus
loading, or the attaching bridge may limit this number. The
boot device must have an ID of 0000b (determined by
ID[3:0]); subsequent devices use incremental numbering.
Equal density must be used with multiple devices.
Multiple Device Selection for
Firmware Memory Cycle
For Firmware Memory Read/Write cycles, hardware strap-
ping values on ID[3:0] must match the values in IDSEL
field. See Table 8 for multiple device selection configura-
tions. The SST49LF004B will compare the IDSEL field with
ID[3:0]'s strapping values. If there is a mismatch, the device
will ignore the reminder of the cycle.
Multiple Device Selection for LPC Memory Cycle
For LPC Memory Read/Write cycles, ID information is
included in the address bits of every cycle. The ID bits in
the address field are the inverse of the hardware strapping.
The address bits (A
23
, A
21
:A
19
) are used to select the
device with proper IDs. See Table 9 for multiple device
selection configurations. The SST49LF004B will compare
these bits with ID[3:0]’s strapping values. If there is a mis-
match, the device will ignore the remainder of the cycle.
TABLE
8: F
IRMWARE
M
EMORY
M
ULTIPLE
D
EVICE
S
ELECTION
C
ONFIGURATION
Device #
0 (Boot device)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
ID[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
IDSEL
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
T8.0 1232
TABLE
9: LPC M
EMORY
M
ULTIPLE
D
EVICE
S
ELECTION
C
ONFIGURATION
Device #
0 (Boot device)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
ID[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
A
23,
A
21
:A
19
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
T9.0 1232
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