參數(shù)資料
型號(hào): SST48CF024
廠商: Silicon Storage Technology, Inc.
英文描述: CompactFlash Card
中文描述: CF卡
文件頁數(shù): 9/60頁
文件大小: 572K
代理商: SST48CF024
Data Sheet
CompactFlash Card
SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
9
2001 Silicon Storage Technology, Inc.
S71125-03-000
9/01
375
TABLE
2-2: S
IGNAL
D
ESCRIPTION
(1
OF
4)
Symbol
A
10
- A
0
(PC Card Memory Mode)
Type
1
I
Pin
Name and Functions
8,10,11,12,
14,15,16,17,
18,19,20
These address lines along with the -REG signal are used to select
the following: The I/O port address registers within the Compact-
Flash card, the memory mapped port address registers within the
CompactFlash card, a byte in the card’s information structure and its
configuration control and status registers.
This signal is the same as the PC Card Memory Mode signal
A
10
- A
0
(PC Card I/O Mode)
A
2
- A
0
(True IDE Mode
I
18,19,20
In True IDE Mode only A[2:0] are used to select the one of eight (True
IDE Mode) registers in the Task File, the remaining address lines
should be grounded by the host.
This signal is asserted high as the BVD1 signal since a battery is not
used with this product.
This signal is asserted low to alert the host to changes in the RDY/-
BSY and Write Protect states, while the I/O interface is configured.
Its use is controlled by the Card Config and Status Register.
In the True IDE Mode, this input/output is the Pass Diagnostic signal
in the Master/Slave handshake protocol.
This output line is always driven to a high state in Memory Mode
since a battery is not required for this product.
This output line is always driven to a high state in I/O Mode since this
product does not support the audio function.
In the True IDE Mode, this input/output is the Disk Active/Slave
Present signal in the Master/Slave handshake protocol.
These Card Detect pins are connected to ground on the Compact-
Flash card. They are used by the host to determine that the Com-
pactFlash card is fully inserted into its socket.
This signal is the same for all modes.
BVD1
(PC Card Memory Mode)
-STSCHG
(PC Card I/O Mode)
I/O
46
Status Changed -PDIAG
(True IDE Mode)
BVD2
(PC Card Memory Mode)
-SPKR
(PC Card I/O Mode)
-DASP
(True IDE Mode)
-CD1, -CD2
(PC Card Memory Mode)
I/O
45
O
26,25
-CD1, -CD2
(PC Card I/O Mode)
-CD1, -CD2
(True IDE Mode)
-CE1, -CE2
(PC Card Memory Mode)
Card Enable
This signal is the same for all modes.
I
7,32
These input signals are used both to select the card and to indicate
to the card whether a byte or a word operation is being performed. -
CE2 always accesses the Odd Byte of the word. -CE1 accesses the
Even Byte or the Odd Byte of the word depending on A
0
and -CE2. A
multiplexing scheme based on A
0
, -CE1, -CE2 allows 8 bit hosts to
access all data on D
0
-D
7
.
See Tables 2-11, 2-13, 2-16, 2-17, and 2-18.
This signal is the same as the PC Card Memory Mode signal.
-CE1, -CE2
(PC Card I/O Mode)
Card Enable
-CS0, -CS1
(True IDE Mode)
In the True IDE Mode CS0 is the chip select for the task file registers
while CS2 is used to select the Alternate Status Register and the
Device Control Register.
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