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參數(shù)資料
| 型號： | SST30VR043-70-E-WH |
| 廠商： | Silicon Storage Technology, Inc. |
| 元件分類： | SRAM |
| 英文描述： | 4 Mbit ROM + 1 Mbit / 256 Kbit SRAM ROM/RAM Combo |
| 中文描述： | 4兆位光盤1兆位/ 256千位的SRAM ROM / RAM內(nèi)存組合 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 111K |
| 代理商： | SST30VR043-70-E-WH |
8
Data Sheet
2 Mbit ROM + 1 Mbit / 2Mbit / 256 Kbit SRAM
ROM/RAM Combo
SST30VR021 / SST30VR022 / SST30VR023
2001 Silicon Storage Technology, Inc.
S71135-02-000
4/01
380
FIGURE
6: SRAM R
EAD
C
YCLE
T
IMING
D
IAGRAM
(A
DDRESS
C
ONTROLLED
) (OE# = RAMCS# = V
IL
, WE# = V
IH
)
FIGURE 7: SRAM R
EAD
C
YCLE
T
IMING
D
IAGRAM
(OE#
OR
RAMCS# C
ONTROLLED
)
TRC
TAA
Data Valid
380 ILL F04.0
Data Out
Previous Data Valid
Address
TOH
TRC
TAA
TOE
TCO
TLZ(2)
TOH
TOHZ(1)
THZ
(1,2)
Data Valid
380 ILL F05.0
Data Out
RAMCS#
High-Z
Address
OE#
Notes: 1. THZ and TOHZ are defined as the time at which the outputs achieve the open circuit condition
and are referenced to the VOH or VOL.
2. At any given temperature and voltage condition THZ(max) is less than TLZ(min) both for a given
device and from device to device.
3. WE# is high for Read cycle.
4. Address valid prior to coincidence with RAMCS# transition low.
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