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參數(shù)資料
| 型號： | SST30VR021-500-E-KH |
| 英文描述： | SRAM/ROM |
| 中文描述： | 的SRAM /光盤 |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 111K |
| 代理商： | SST30VR021-500-E-KH |
Data Sheet
2 Mbit ROM + 1 Mbit / 2Mbit / 256 Kbit SRAM
ROM/RAM Combo
SST30VR021 / SST30VR022 / SST30VR023
9
2001 Silicon Storage Technology, Inc.
S71135-02-000
4/01
380
FIGURE 8: SRAM W
RITE
C
YCLE
T
IMING
D
IAGRAM
TABLE
8: F
UNCTIONAL
D
ESCRIPTION
/T
RUTH
T
ABLE
Address Inputs
X
A
17
-A
0
A
17
-A
0
Only
A
MS
3
-A
0
are valid
4
Only
A
MS
3
-A
0
are valid
4
Only
A
MS
3
-A
0
are valid
4
ROMCS#
1
H
L
L
H
H
H
1. If is forbidden for ROMCS# pin and RAMCS# pin to be
“
0
”
at the same time
2. X means Don
’
t Care.
3. A
MS
= A
16
for SST30VR021, A
17
for SST30VR022, and A
14
for SST30VR023
4. For SST30VR021: A
17
must be fixed to
“
L
”
or
“
H
”
For SST30VR023: A
15
, A
16
, and A
17
must be fixed to
“
L
”
or
“
H
”
RAMCS#
1
H
H
H
L
L
L
WE#
X
2
X
2
X
2
H
H
L
OE#
X
2
H
L
H
L
H
DQ
0
-DQ
7
Z
Z
Dout
Z
Dout
Din
Standby
Output Floating
ROM Read
Output Floating
RAM Read
RAM Write
T8.4 380
Notes: 1. A write occurs during the overlap (TWP) of a low RAMCS# and low WE#. A write begins at the latest transition among
RAMCS# going low and WE# going low: A write end at the earliest transition among RAMCS# going high and WE# going high,
TWP is measured from the beginning of write to the end of write.
2. TCW is measured from the later of RAMCS# going low to the end of write.
3. TAS is measured from the address valid to the beginning of write.
4. TWR is measured from the end of write to the address change.
5. If RAMCS#, WE# are in the read mode during this period, the I/O pins are in the outputs Low-Z state.
Inputs of opposite phase of the output must not be applied because bus contention can occur.
6. If RAMCS# goes low simultaneously with WE# going low or after WE# going low, the outputs remain high impedance state.
7. DOUT is the same phase of the latest written data in this write cycle.
8. DOUT is the read data of new address
9. ROMCS# = VIH
TWC
TAW
TCW(2)
TOH
TDH
TDW
TOW
TWR(4)
Data Valid
380 ILL F07.0
Data In
Data Out
WE#
High-Z
High-Z (6)
(7)
(8)
Address
RAMCS#
TWP(1)
TAS(3)
TWHZ(5)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SST30VR021-500-I-KH | Input/Output (I/O); Supply Voltage: 2.4V to 5.25V; Temperature Range: -40° to +85°C; Package: 8-SOIC; Features: 4 Configurable I/Os |
| SST30VR021-500-I-WH | Input/Output (I/O); Supply Voltage: 2.4V to 5.25V; Temperature Range: -40° to +85°C; Package: 16-QFN (16-COL); Features: 6 Configurable I/Os |
| SST30VR023-500-C-KH | Input/Output (I/O); Supply Voltage: 2.4V to 5.25V; Temperature Range: -40° to +85°C; Package: 16-QFN (16-COL); Features: 8 Configurable I/Os |
| SST30VR023-500-E-KH | SRAM/ROM |
| SST30VR023-500-I-KH | SRAM/ROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SST30VR021-500-E-WH | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:2 Mbit ROM + 1 Mbit / 2Mbit / 256 Kbit SRAM ROM/RAM Combo |
| SST30VR021-500-I-KH | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM/ROM |
| SST30VR021-500-I-WH | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM/ROM |
| SST30VR021-70-C-WH | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:2 Mbit ROM + 1 Mbit / 2Mbit / 256 Kbit SRAM ROM/RAM Combo |
| SST30VR021-70-E-WH | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:2 Mbit ROM + 1 Mbit / 2Mbit / 256 Kbit SRAM ROM/RAM Combo |
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