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參數(shù)資料
| 型號： | SSM3J16CT |
| 廠商： | Toshiba Corporation |
| 英文描述： | Field Effect Transistor Silicon P Channel MOS Type High Speed Switching Applications Analog Switch Applications |
| 中文描述： | 場效應(yīng)晶體管硅P通道馬鞍山型高速開關(guān)應(yīng)用模擬開關(guān)應(yīng)用 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 202K |
| 代理商： | SSM3J16CT |
SSM3J16CT
2007-11-01
1
TOSHIBA Field Effect Transistor Silicon P Channel MOS Type
SSM3J16CT
High Speed Switching Applications
Analog Switch Applications
Small package
Low on-resistance
: R
on
=
8
Ω
(max) (@V
GS
=
4 V)
: R
on
=
12
Ω
(max) (@V
GS
=
2.5 V)
: R
on
=
45
Ω
(max) (@V
GS
=
1.5 V)
Absolute Maximum Ratings
(Ta = 25°C)
Characteristics
Symbol
Rating
Unit
Drain-Source voltage
V
DS
20
V
Gate-Source voltage
V
GSS
±
10
V
DC
I
D
100
Drain current
Pulse
I
DP
200
mA
Drain power dissipation (Ta
=
25°C)
P
D
(Note 1)
100
mW
Channel temperature
T
ch
150
°C
Storage temperature range
T
stg
55~150
°C
Note:
Using continuously under heavy loads (e.g. the application of
high temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the
reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the
absolute maximum ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: Mounted on an FR4 board
(10 mm
×
10 mm
×
1.0 t, Cu Pad: 100 mm
2
)
Marking (Top View) Pin Condition (Top View)
Equivalent Circuit
Handling Precaution
When handling individual devices that are not yet mounted on a circuit board, ensure that the environment is protected
against electrostatic discharge. Operators should wear anti-static clothing, and containers and other objects that come
into direct contact with devices should be made of anti-static materials.
Unit: mm
JEDEC
―
JEITA
―
TOSHIBA
2-1J1B
Weight :0.75mg
CST3
３
１
２
0
1
0
0.35±0.02
0.15±0.03
0
0.5±0.03
0.6±0.05
0
-
0.05±0.03
0
1. Gate
2. Source
3. Drain
*
Electrodes: On the bottom
Polarity mark
Polarity mark (on the top)
1
2
3
S2
1
2
3
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