參數(shù)資料
型號: SSM2804CBZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 7/36頁
文件大?。?/td> 0K
描述: IC AMP AUDIO DR 30-WLSCP
標(biāo)準(zhǔn)包裝: 1
類型: D 類
輸出類型: 2-通道(立體聲)帶立體聲耳機(jī)
在某負(fù)載時最大輸出功率 x 通道數(shù)量: 3.6W x 2 @ 4 歐姆; 40mW x 2 @ 16 歐姆
電源電壓: 2.5 V ~ 3.6 V
特點: 消除爆音,I²C,短路和熱保護(hù),關(guān)機(jī),音量控制
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: 30-WLCSP(2.96x2.46)
封裝/外殼: 30-WFBGA,WLBGA
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: SSM2804CBZ-RLDKR
SSM2804
Rev. 0 | Page 15 of 36
ALC Compression and Limiter Modes
The ALC implemented on the SSM2804 has two operation
modes: compression mode and limiter mode. When the ALC
is triggered for medium-level input signals, the ALC is in com-
pression mode. In this mode, an increase of the output signal is
one-third the increase of the input signal. For example, if the
input signal increases by 3 dB, the ALC reduces the amplifier
gain by 2 dB and, thus, the output signal increases by only 1 dB.
As the input signal becomes very large, the ALC transitions to
limiter mode. In this mode, the output stays at a given threshold
level, VTH, even if the input signal grows larger. As an example of
limiter mode operation, when a large input signal increases by
3 dB, the ALC reduces the amplifier gain by 3 dB and, thus, the
output increases by 0 dB. When the amplifier gain is reduced to
1 dB, the ALC cannot reduce the gain further, and the output
increases again. This is because the total range of the ALC opera-
tion has bottomed out due to extreme input voltage at high gain. To
avoid potential speaker damage, the maximum input amplitude
should not be large enough to exceed the maximum attenuation
(to a level of 1 dB) of the limiter mode.
Attack Time, Hold Time, and Release Time
When the amplifier input signal exceeds a preset threshold,
the ALC reduces amplifier gain rapidly until the output voltage
settles to a target level. This target level is maintained for a certain
period. If the input voltage does not exceed the threshold again,
the ALC increases the gain gradually.
The attack time is the time taken to reduce the gain from maxi-
mum to minimum. The hold time is the time that the reduced
gain is maintained. The release time is the time taken to increase
the gain from minimum to maximum. These times are shown
in Table 8. The attack time and the release time can be set using
the ALC 1 control register (Address 0x0A).
Table 8. ALC Attack, Hold, and Release Times
Time1
Duration
Attack Time
32 μs to 4 ms (per 0.5 dB step)
Hold Time
90 ms to 120 ms
Release Time
4 ms to 512 ms (per 0.5 dB step)
1 The attack time and release time can be adjusted using the I2C interface.
The hold time cannot be adjusted.
Soft-Knee Compression
Often performed using sophisticated DSP algorithms, soft-knee
compression provides maximum sound quality with effective
speaker protection. Instead of using a fixed compression setting
prior to limiting, the SSM2804 allows for a much more subtle
transition into limiting mode, preserving the original sound
quality of the source audio. Figure 31 to Figure 33 show the
various soft-knee compression settings that can be selected
using the COMP bit settings (Bits[D6:D5] of Register 0x0B).
0
0.5
1.0
1.5
2.0
2.5
0
0.05
0.10 0.15 0.20
0.30 0.35
0.40
0.45
0.25
0.50
INPUT VOLTAGE (V)
OU
TP
U
T
V
O
L
T
A
G
E
(
V
)
00 (COMPRESSION MODE 1)
01 (COMPRESSION MODE 2)
10 (COMPRESSION MODE 3)
11 (LIMITER MODE)
2.7V × 0.78 = 2.106V
09
96
0-
1
07
Figure 31. Adjustable Compression Settings, PVDD = 2.7 V,
ALC Threshold Level = 78%
0
0.5
1.5
2.0
2.5
1.0
3.0
3.5
0
0.1
0.2
0.3
0.4
0.6
0.7
0.8
0.9
0.5
1.0
INPUT VOLTAGE (V)
OU
T
P
U
T
V
O
LT
A
G
E
(
V
)
00 (COMPRESSION MODE 1)
01 (COMPRESSION MODE 2)
10 (COMPRESSION MODE 3)
11 (LIMITER MODE)
3.6V × 0.78 = 2.808V
0
99
60
-1
1
8
Figure 32. Adjustable Compression Settings, PVDD = 3.6 V,
ALC Threshold Level = 78%
0
0.5
1.5
2.0
2.5
1.0
3.0
4.0
3.5
4.5
0
0.2
0.4
0.6
0.8
1.2
1.4
1.6
1.8
1.0
2.0
INPUT VOLTAGE (V)
OU
T
P
U
T
V
O
LT
A
G
E
(
V
)
00 (COMPRESSION MODE 1)
01 (COMPRESSION MODE 2)
10 (COMPRESSION MODE 3)
11 (LIMITER MODE)
5.0V × 0.78 = 3.9V
0
99
60
-1
1
9
Figure 33. Adjustable Compression Settings, PVDD = 5.0 V,
ALC Threshold Level = 78%
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