SSM2804
Rev. 0 | Page 19 of 36
I2C SOFTWARE CONTROL INTERFACE
The I2C interface provides access to the user-selectable control
registers and operates with a 2-wire interface.
Each control register consists of 16 bits, MSB first. Bits[B15:B9]
are the register map address, and Bits[B8:B0] are the register data
for the associated register map.
SDA generates the serial control data-word, and SCL
clocks the serial data. The I2C bus address (Bits[A7:A1]) is
0x3B (01110110 for write and 01110111 for read). Bit A0 is
the designated read/write bit.
P
9
8
1TO 7
9
8
1TO 7
9
8
1TO 7
S
SDA
SCL
START
ADDR
R/W
SUBADDRESS
ACK
STOP
DATA
09
96
0
-02
9
Figure 37. 2-Wire I2C Generalized Clocking Diagram
WRITE
SEQUENCE
READ
SEQUENCE
SA1
A7
A0
A(S)
S
B15
B9
0
01
0P
0
...
A1
A7
A0
A(S)
...
B0
B8
B7
A(M)
...
B0
B7
P
...
DEVICE
ADDRESS
DEVICE
ADDRESS
REGISTER
ADDRESS
SA1
A7
A0
A(S)
B15
B9
B8
0
...
DEVICE
ADDRESS
REGISTER
ADDRESS
REGISTER
DATA
(SLAVE DRIVE)
REGISTER
DATA
S/P = START/STOP BIT.
A0 = I2C R/W BIT.
A(S) = ACKNOWLEDGE BY SLAVE.
A(M) = ACKNOWLEDGE BY MASTER.
A(M) = ACKNOWLEDGE BY MASTER (INVERSION).
09
96
0-
03
0
Figure 38. I2C Write and Read Sequences