- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382543 > SPT5510SIM (FAIRCHILD SEMICONDUCTOR CORP) 16-BIT, 200 MWPS ECL D/A CONVERTER PDF資料下載
參數(shù)資料
| 型號： | SPT5510SIM |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | DAC |
| 英文描述： | 16-BIT, 200 MWPS ECL D/A CONVERTER |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 0.035 us SETTLING TIME, 16-BIT DAC, PQFP44 |
| 封裝： | 10 X 10 MM, METRIC, PLASTIC, QFP-44 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 61K |
| 代理商： | SPT5510SIM |
4
9/27/00
SPT5510
THEORY OF OPERATION
The SPT5510 is a segmented 16-bit current-output DAC.
The four MSBs, D15–D12, are decoded to fifteen unit cells
(current sinks). The remaining bits (D11–D0) are binary;
bits D9–D0 are derived from an R-2R ladder. All cells are
laser trimmed for maximum accuracy. The block diagram
shows the basic architecture.
All output cells are always on, with the data determining
whether a given cell’s current is routed from I
OUT
or I
OUT
.
This provides nearly constant power dissipation indepen-
dent of data and clock rate. It also reduces noise transients
on power and ground lines.
The reference loop utilizes an MSB-weighted cell and pro-
vides a gain of about 16 to the output. The on-chip refer-
ence amplifier has very high open-loop gain and is offset
trimmed to provide a very low temperature drift (typically
<10 ppm/
°
C gain drift).
POWER SUPPLY AND GROUNDING
The SPT5510 requires a single –5.2V power supply. All
supply pins attach to a common on-chip power bus and
should be treated as analog supplies. For best settling per-
formance, each supply pin should be decoupled as shown
in figure 1 – typical interface circuit.
There are three separate on-chip ground busses. DGND
pins should be tied together and connected to system
ground through a ferrite bead. REFGND and OGND pins
should be tied directly to the SPT5510’s ground plane and
connected to system ground through a ferrite bead. It is
critical that REFGND and OGND are very tightly coupled,
as any differential signal (dc offset, noise, etc.) will be
transmitted to the output. Two of the OGND pins can be
disconnected from the ground plane and used as sense
lines for a current-to-voltage converter, as shown in the
OUTPUTS section.
D
D
D
D
O
O
O
O
A
E
A
E
A
E
A
E
A
E
A
E
A
E
A
E
C
C
C
C
C
.
μ
F
.
μ
F
.
μ
F
.
μ
F
.
μ
F
R
R
R
R
R
R
1
1
1
1
1
1
C
C
C
C
2
μ
F
2
μ
F
2
μ
F
2
μ
F
1
4
2
3
4
4
3
3
3
4
1
1
1
2
3
3
1
2
3
4
5
6
7
8
25
26
27
28
29
30
31
32
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
C
.
μ
F
C
4
C
4
C
4
C
.
μ
F
C
.
μ
F
C12
10 pF
C13
20 pF
50
R
5
R
1
R
1
R
R
C
B
O
A
I
R
S
A
C
A
B
A
O
R
I
I
OUT
I
OUT
9
2
1
1
1
1
1
1
2
2
41
36
C1–C13 — SURFACE MOUNT CERAMIC CHIP
C14–C17 — TANTALUM
R1–R6 — CARBON FILM 1/4 W
R7–R10 — SURFACE MOUNT CERAMIC CHIP
FB — FERRITE BEAD is to be located as closely
to the device as possible.
SPT5510
AV
EE
R10
FB
AV
EE
Input
Data
Output
Complementary
Output
Figure 1 – Typical Interface Circuit
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SPT7610 | 6-BIT, 1 GSPS FLASH A/D CONVERTER |
| SPT7610SIQ | 6-BIT, 1 GSPS FLASH A/D CONVERTER |
| SPT7710 | 8-BIT, 150 MSPS, FLASH A/D CONVERTER |
| SPT7710AIG | 8-BIT, 150 MSPS, FLASH A/D CONVERTER |
| SPT7710AIJ | 8-BIT, 150 MSPS, FLASH A/D CONVERTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SPT574 | 制造商:CADEKA 制造商全稱:CADEKA 功能描述:FAST, COMPLETE 12-BIT mP COMPATIBLE A/D CONVERTER WITH SAMPLE/HOLD |
| SPT574BCJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FAST, COMPLETE 12-BIT uP COMPATIBLE A/D CONVERTER WITH SAMPLE/HOLD |
| SPT574BCN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FAST, COMPLETE 12-BIT uP COMPATIBLE A/D CONVERTER WITH SAMPLE/HOLD |
| SPT574BCS | 制造商:CADEKA 制造商全稱:CADEKA 功能描述:FAST, COMPLETE 12-BIT mP COMPATIBLE A/D CONVERTER WITH SAMPLE/HOLD |
| SPT574CCJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FAST, COMPLETE 12-BIT uP COMPATIBLE A/D CONVERTER WITH SAMPLE/HOLD |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。