參數(shù)資料
型號(hào): SPT5510
廠商: Fairchild Semiconductor Corporation
英文描述: 16-BIT, 200 MWPS ECL D/A CONVERTER
中文描述: 16位,200 MWPS ECL D / A轉(zhuǎn)換
文件頁數(shù): 3/8頁
文件大?。?/td> 61K
代理商: SPT5510
3
9/27/00
SPT5510
ELECTRICAL SPECIFICATIONS
T
A
= 25
°
C, V
EE
=–5.2 V
±
5%, 50% duty cycle clock, unless otherwise specified.
TEST
CONDITIONS
TEST
LEVEL
SPT5510
TYP
PARAMETERS
MIN
MAX
UNITS
Power Supply Requirements
Negative Supply Current (–5.2 V)
Nominal Power Dissipation
Power Supply Rejection Ratio
T
MIN
–T
MAX
VI
V
I
115
600
150
800
0.6
mA
mW
% FS
V Supply =
±
5 %
–0.6
±
0.002
Voltage Input and Control
Bandgap Reference Voltage
Bandgap Output Current
Ref Amp Bandwidth
3
Ref Amp Input Current
Ref Amp Output Current
Ref In Operating Voltage
V
IV
V
V
V
V
–1.2
16
40
16
200
–3.4
V
μ
A
MHz
μ
A
μ
A
V
T
A
=25
°
C
±
10
°
C
–110
220
Digital Inputs
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
Input Capacitance
Input Setup Time (t
S
)
Input Hold Time (t
H
)
Clock Pulse Width (t
PWH
)
T
MIN
–T
MAX
T
MIN
–T
MAX
–0.8 V
–1.8 V
VI
VI
V
V
V
IV
IV
IV
–1.0
–0.8
–1.7
2.5
V
V
μ
A
μ
A
pF
ns
ns
ns
–1.5
0
3
3.0
0.5
1.5
3
Ref Amp Bandwidth is limited by its compensation network
TEST LEVEL CODES
All electrical characteristics are subject
to the following conditions:
All parameters having min/max specifi-
cations are guaranteed. The Test Level
column indicates the specific device
testing actually performed during pro-
duction and Quality Assurance inspec-
tion. Any blank section in the data
column indicates that the specification
is not tested at the specified condition.
TEST LEVEL
TEST PROCEDURE
I
100% production tested at the specified temperature.
100% production tested at T
A
= +25
°
C, and sample tested at the specified
temperatures.
QA sample tested only at the specified temperatures.
Parameter is guaranteed (but not tested) by design and characterization
data.
Parameter is a typical value for information purposes only.
100% production tested at T
A
= +25
°
C. Parameter is guaranteed over
specified temperature range.
II
III
IV
V
VI
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