參數(shù)資料
型號(hào): SPT5240
廠商: Fairchild Semiconductor Corporation
英文描述: 10-bit, 400 MWPS Current Output Digital-to-Analog Converter
中文描述: 10位,400 MWPS電流輸出數(shù)字模擬轉(zhuǎn)換器
文件頁(yè)數(shù): 6/10頁(yè)
文件大?。?/td> 102K
代理商: SPT5240
6
REV. 1 June 2003
DATA SHEET
SPT5240
Specification Definitions
Differential Linearity Error (DLE) or
Differential Nonlinearity (DNL)
In an ideal DAC, output transitions between two adjacent
codes are 1 LSB apart. Differential Linearity Error is the
deviation, expressed in LSBs, from this ideal value.
Integral Linearity Error (ILE) or
Integral Nonlinearity (INL)
The ideal transfer for a DAC is a straight line drawn between
"zero-scale" output and "full-scale" output. ILE is the
deviation of the output from the straight line. The deviation
of the output at each code is measured and compared to the
ideal output at that code. ILE may also be expressed as a
sum of DLE starting from code 0…0 to the code that ILE
measurement is desired.
Monotonic
A digital-to-analog converter is considered monotonic if
the analog output never decreases as the code value at the
input increases. A DLE less than -1 LSB would indicate a
non-monotonic DAC.
Offset Error
The deviation, from ideal, at the DAC output when set to
zero-scale. In the current output DAC there should be no
current flow at zero-scale. Therefore, Offset Error is the
amount of current measured with the DAC set to zero-scale.
Full-Scale Error
The ideal maximum full-scale current output of the DAC is
determined by the value of R
SET
deviation of the output from ideal with the offset error
included.
. Full-scale error is the
Gain Error
The ideal maximum full-scale current output of the DAC is
determined by the value of R
SET
of the output from ideal with the offset error removed.
. Gain error is the deviation
Full-Scale Output
The maximum current output available for a given value of
R
SET
. In the SPT5240 IOP is full-scale at code 1111111111
and IO
N
is full-scale at code 0000000000.
Zero-Scale Output
The minimum current output, ideally zero amps. In the
SPT5240 IO
P
is zero-scale at code 0000000000 and IO
is zero-scale at code 1111111111.
N
Compliance Voltage
The maximum terminal output voltage for which the device
will provide the specified current output characteristics.
Harmonic
1. Of a sinusoidal wave, an integer multiple of the frequency
of the wave.
Note:
The frequency of the sine wave is called
the fundamental frequency or the first harmonic, the
second harmonic is twice the fundamental frequency,
the
third harmonic is three times the fundamental frequency, etc.
2. Of a periodic signal or other periodic phenomenon, such
as an electromagnetic wave or a sound wave, a component
frequency of the signal that is an integer multiple of the
fundamental frequency.
Note:
is the reciprocal of the period of the periodic phenomenon.
The fundamental frequency
Total Harmonic Distortion (THD)
The ratio of the sum of the power of first 9 harmonics above
the fundamental frequency to the power of the fundamental
frequency. Usually expressed in dBc.
Spurious Free Dynamic Range (SFDR)
The ratio of the fundamental sinusoidal power to the power
of the single largest harmonic or spurious signal within the
range of the 9th harmonic.
Clock Feedthrough
The ratio of the full-scale output to the peak-to-peak noise
generated at the DAC output by input clock transitions.
Expressed in dBFS.
Major Code Transition
The DAC code transition between 011…1 and 100…0 is
referred to as major code transition. This transition often
involves maximum number of internal circuit elements to
switch states, resulting in worst DLE, ILE, glitch, etc.
Glitch Energy
A glitch is a switching transient that appears in the output of
a DAC during a code transition. Glitch energy is measured as
a product of the output voltage and time duration for major
code transition, expressed in pV-s.
Output Rise Time
The amount of time for the output to change from 10%
to 90% of the full-scale voltage, for a positive full scale
transition from zero-scale to full-scale.
Output Fall Time
The amount of time for the output to change from 90%
to 10% of the full-scale voltage, for a negative full scale
transition from full-scale to zero-scale.
相關(guān)PDF資料
PDF描述
SPT5400 13-BIT, OCTAL VOLTAGE-OUTPUT DAC WITH PARALLEL INTERFACE
SPT5400SCP 13-BIT, OCTAL VOLTAGE-OUTPUT DAC WITH PARALLEL INTERFACE
SPT5420 13-BIT, OCTAL D/A CONVERTER
SPT5420SIM 13-BIT, OCTAL D/A CONVERTER
SPT5510 16-BIT, 200 MWPS ECL D/A CONVERTER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SPT5240SIT 功能描述:數(shù)模轉(zhuǎn)換器- DAC 10BIT 400MWPS 3V DaC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類(lèi)型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
SPT5240SIT_Q 功能描述:數(shù)模轉(zhuǎn)換器- DAC 10BIT 400MWPS 3V DaC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類(lèi)型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
SPT5303 制造商:SSDI 制造商全稱:Solid States Devices, Inc 功能描述:200 WATT NPN SILICON POWER TRANSISTOR
SPT5310 制造商:CADEKA 制造商全稱:CADEKA 功能描述:12-BIT, 250 MWPS ECL D/A CONVERTER
SPT5310SIN 制造商:CADEKA 制造商全稱:CADEKA 功能描述:12-BIT, 250 MWPS ECL D/A CONVERTER