- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10956 > SPC5604CF2MLL6 (Freescale Semiconductor)IC MCU 32BIT 512KB FLASH 100LQFP PDF資料下載
參數(shù)資料
| 型號： | SPC5604CF2MLL6 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 66/109頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 32BIT 512KB FLASH 100LQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | MPC56xx Qorivva |
| 核心處理器： | e200z0h |
| 芯體尺寸： | 32-位 |
| 速度： | 64MHz |
| 連通性： | CAN，I²C，LIN，SCI，SPI |
| 外圍設(shè)備： | DMA，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 79 |
| 程序存儲器容量： | 512KB（512K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 48K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 3 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 28x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 100-LQFP |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁當(dāng)前第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁
MPC5604B/C Microcontroller Data Sheet, Rev. 11.1
Block diagram
Freescale Semiconductor
6
Table 2. MPC5604B/C series block summary
Block
Function
Analog-to-digital converter (ADC) Multi-channel, 10-bit analog-to-digital converter
Boot assist module (BAM)
A block of read-only memory containing VLE code which is executed according
to the boot mode of the device
Clock monitor unit (CMU)
Monitors clock source (internal and external) integrity
Cross triggering unit (CTU)
Enables synchronization of ADC conversions with a timer event from the eMIOS
or from the PIT
Deserial serial peripheral interface
(DSPI)
Provides a synchronous serial interface for communication with external devices
Error Correction Status Module
(ECSM)
Provides a myriad of miscellaneous control functions for the device including
program-visible information about configuration and revision levels, a reset
status register, wakeup control for exiting sleep modes, and optional features
such as information on memory errors reported by error-correcting codes
Enhanced Direct Memory Access
(eDMA)
Performs complex data transfers with minimal intervention from a host processor
via “n” programmable channels.
Enhanced modular input output
system (eMIOS)
Provides the functionality to generate or measure events
Flash memory
Provides non-volatile storage for program code, constants and variables
FlexCAN (controller area network) Supports the standard CAN communications protocol
Frequency-modulated
phase-locked loop (FMPLL)
Generates high-speed system clocks and supports programmable frequency
modulation
Internal multiplexer (IMUX) SIU
subblock
Allows flexible mapping of peripheral interface on the different pins of the device
Inter-integrated circuit (I2C) bus A two wire bidirectional serial bus that provides a simple and efficient method of
data exchange between devices
Interrupt controller (INTC)
Provides priority-based preemptive scheduling of interrupt requests
JTAG controller
Provides the means to test chip functionality and connectivity while remaining
transparent to system logic when not in test mode
LINFlex controller
Manages a high number of LIN (Local Interconnect Network protocol) messages
efficiently with a minimum of CPU load
Clock generation module
(MC_CGM)
Provides logic and control required for the generation of system and peripheral
clocks
Mode entry module (MC_ME)
Provides a mechanism for controlling the device operational mode and mode
transition sequences in all functional states; also manages the power control unit,
reset generation module and clock generation module, and holds the
configuration, control and status registers accessible for applications
Power control unit (MC_PCU)
Reduces the overall power consumption by disconnecting parts of the device
from the power supply via a power switching device; device components are
grouped into sections called “power domains” which are controlled by the PCU
Reset generation module
(MC_RGM)
Centralizes reset sources and manages the device reset sequence of the device
Memory protection unit (MPU)
Provides hardware access control for all memory references generated in a
device
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CS4299-JQZ | IC CODEC AC 97 W/SRC 48LQFP |
| MCF5208CVM166J | IC MCU 32BIT 196-MAPBGA |
| CS42L51-CNZ | IC CODEC STEREO W/HDPN AMP 32QFN |
| MC9S12C128CPBE | IC MCU 128K FLASH 25MHZ 52-LQFP |
| CS4245-CQZ | IC CODEC AUD STER 104DB 48LQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SPC5604PEF0MLL6 | 功能描述:32位微控制器 - MCU MPC5604P PICTUS 512K RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT |
| SPC5604PEF0MLL7R | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
| SPC5604PEF0MLQ6 | 功能描述:32位微控制器 - MCU MPC5604P PICTUS 512K RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT |
| SPC5604PEF0MLQ7R | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
| SPC5604PEF0VLL7R | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。