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參數(shù)資料
| 型號(hào)： | SPAKXC16Z1MFC16 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, 16.78 MHz, MICROCONTROLLER, PQFP132 |
| 封裝： | PLASTIC, SMT-132 |
| 文件頁(yè)數(shù)： | 182/200頁(yè) |
| 文件大?。?/td> | 1383K |
| 代理商： | SPAKXC16Z1MFC16 |
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MOTOROLA
MC68HC16Z1
82
MC68HC16Z1TS/D
The modmap (MM) bit in the system integration module configuration register (SIMCR) defines the most
significant bit (ADDR23) of the address, shown in each register figure as Y. This bit, concatenated with
the rest of the address given, forms the absolute address of each register. Because the CPU16 in the
MC68HC16Z1 drives only ADDR[19:0], ADDR[23:20] follow the logic state of ADDR19, and Y must
equal $F. Refer to the SIM section of this technical summary for more information about how the state
of MM affects the system.
5.1.1 Global Registers
The QSM global registers contain system parameters used by both the QSPI and the SCI submodules.
These registers contain the bits and fields used to configure the QSM.
The QSMCR contains parameters for the QSM/CPU/intermodule bus (IMB) interface.
STOP — Stop Enable
0 = Normal QSM clock operation
1 = QSM clock operation stopped
STOP places the QSM in a low-power state by disabling the system clock in most parts of the module.
QSMCR is the only register guaranteed to be readable while STOP is asserted. The QSPI RAM is not
readable. However, writes to RAM or any register are guaranteed to be valid while STOP is asserted.
STOP can be negated by the CPU and by reset.
The system software must stop each submodule before asserting STOP to avoid complications at re-
start and to avoid data corruption. The SCI submodule receiver and transmitter should be disabled, and
the operation should be verified for completion before asserting STOP. The QSPI submodule should be
stopped by asserting the HALT bit in SPCR3 and by asserting STOP after the HALTA flag is set.
FRZ1 — Freeze 1
0 = Ignore the FREEZE signal on the IMB
1 = Halt the QSPI (on a transfer boundary)
FRZ1 determines what action is taken by the QSPI when the FREEZE signal of the IMB is asserted.
FREEZE is asserted whenever the CPU enters the background mode.
FRZ0 — Freeze 0
Reserved
Bits [12:8] — Not Implemented
SUPV — Supervisor/Unrestricted
0 = User access
1 = Supervisor access (MC68HC16Z1 default)
SUPV defines the assignable QSM registers as either supervisor-only data space or unrestricted data
space. Because the CPU16 in the MC68HC16Z1 operates in supervisor mode only, this bit has no ef-
fect.
Bits [6:4] — Not Implemented
IARB — Interrupt Arbitration Identification Number
Each module that generates interrupts must have an IARB field. In this field, each module has a unique
value that is used to arbitrate for the IMB when modules generate simultaneous interrupts of the same
priority. Refer to the SIM section of this summary for more information.
QSMCR — QSM Configuration Register
$YFFC00
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
STOP
FRZ1
FRZ0
0
SUPV
0
IARB
RESET:
0
1
0
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PDF描述 |
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| SPAKXC16Z1CFC25 | 16-BIT, 25 MHz, MICROCONTROLLER, PQFP132 |
| SPAKXC16Z1VFV20 | 16-BIT, 20 MHz, MICROCONTROLLER, PQFP144 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SPAKXC301GC100D | 制造商:Motorola Inc 功能描述: |
| SPAKXC301PW100D | 制造商:Motorola Inc 功能描述: |
| SPAKXC309AG100A | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 24 BIT DSP PBFREE RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| SPAKXC309GC100A | 制造商:Motorola 功能描述:MOTOROLA |
| SPAKXC309VF100A | 功能描述:IC DSP 24BIT 100MHZ 196-MAPBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:DSP563xx 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點(diǎn) 接口:I²C，McASP，McBSP 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤(pán) 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
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