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參數(shù)資料
| 型號： | SP8861NAHP |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | 1·3GHz Low Power Single-Chip Frequency Synthesiser |
| 中文描述： | 1.3 GHz的低功耗單芯片頻率合成器 |
| 文件頁數(shù)： | 7/13頁 |
| 文件大?。?/td> | 200K |
| 代理商： | SP8861NAHP |
7
SP8861
Fig. 7 Data format diagrams
G2
G1
2
18
2
17
2
16
2
15
2
14
2
13
2
12
2
11
2
10
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
C2
C1
MSB
LSB
PHASE
DETECTOR GAIN
CONTROL
(SEE TABLE 1)
PHASE
DETECTOR
SENSE BIT
(SEE TABLE 2)
15-BIT PROGRAMMABLE COUNTER (M COUNTER)
4-BIT
PROGRAMMABLE
COUNTER
(A COUNTER)
CONTROL
LOGIC
(SEE
TABLE 3)
Fig. 7a F1 or F2 word, bit allocation with
4
16/17 selected
G2
G1
2
17
2
16
2
15
2
14
2
13
2
12
2
11
2
10
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
C2
C1
MSB
LSB
PHASE
DETECTOR GAIN
CONTROL
(SEE TABLE 1)
15-BIT PROGRAMMABLE COUNTER (M COUNTER)
3-BIT
PROGRAMMABLE
COUNTER
(A COUNTER)
CONTROL
LOGIC
(SEE
TABLE 3)
Fig. 7b F1 or F2 word, bit allocation with
4
8/9 selected
0
MUST BE ZERO
PD1 PD2
2
12
2
11
2
10
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
C
2
C
1
MSB
LSB
PHASE
DETECTOR
BISTABLE
CONTROL
(SEE TABLE 4)
13-BIT PROGRAMMABLE COUNTER (R COUNTER)
CONTROL
LOGIC
(SEE
TABLE 3)
Fig. 7c Reference word bit allocation
DUAL MODULUS
N RATIO SELECT
0 =
4
16/17
1 =
4
8/9
22 BITS
0 0
22 BITS
1 0
22 BITS
1 1
22 CLOCKS
22 CLOCKS
22 CLOCKS
F1 WORD
F2 WORD
REF WORD
DATA LOADS ON FALLING EDGES
DATA
DATA CLOCK
CHIP SELECT
Fig. 7d Data load sequence
PHASE
DETECTOR
SENSE BIT
(SEE TABLE 2)
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