參數(shù)資料
型號(hào): SN74TVC3010DGV
廠商: Texas Instruments, Inc.
英文描述: 10-BIT VOLTAGE CLAMP
中文描述: 10位電壓鉗位
文件頁(yè)數(shù): 6/11頁(yè)
文件大?。?/td> 142K
代理商: SN74TVC3010DGV
SN74TVC3010
10-BIT VOLTAGE CLAMP
SCDS088A – APRIL 1999 – REVISED JUNE 1999
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
TVC voltage-limiting application
For the voltage-limiting configuration, the common GATE input must be connected to one side (A or B) of any
one of the transistors (see Figure 3). This connection determines the V
BIAS
input of the reference transistor. The
V
BIAS
input is connected through a pullup resistor (typically, 200 k
) to the V
DD
supply. A filter capacitor on V
BIAS
is recommended. The opposite side of the reference transistor is used as the reference voltage (V
REF
)
connection. The V
REF
input must be less than V
DD
– 1 V to bias the reference transistor into conduction. The
reference transistor regulates the gate voltage (V
G
) of all the pass transistors. V
G
is determined by the
characteristic gate-to-source voltage difference (V
GS
) because V
G
= V
REF
+ V
GS
. The low-voltage side of the
pass transistors has a high-level voltage limited to a maximum of V
G
– V
GS
, or V
REF
.
200 k
3.3 V
150
150
150
150
Open-Drain
CPU Interface
Motherboard
Interface
3
4
5
24
46
45
44
25
1
2.5 V
TVC16222
GATE
48
B1 (VBIAS)
47
2
A1 (VREF)
VREF and VBIAS can be applied to any one of the pass transistors. GATE must be connected externally to VBIAS.
Figure 3. Typical Application Circuit
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