- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄365640 > SN74LVT543DB (Texas Instruments, Inc.) 3.3-V ABT OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS PDF資料下載
參數(shù)資料
| 型號： | SN74LVT543DB |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 3.3-V ABT OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS |
| 中文描述： | 的3.3V ABT生根粉八路收發(fā)登記，3態(tài)輸出 |
| 文件頁數(shù)： | 7/13頁 |
| 文件大小： | 335K |
| 代理商： | SN74LVT543DB |
SN54LVT543, SN74LVT543
3.3-V ABT OCTAL REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS137D – MAY 1992 – REVISED JULY 1995
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
1.5 V
th
tsu
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT FOR OUTPUTS
S1
6 V
Open
GND
500
500
Data Input
Timing Input
1.5 V
2.7 V
0 V
1.5 V
1.5 V
2.7 V
0 V
2.7 V
0 V
1.5 V
1.5 V
tw
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
1.5 V
1.5 V
2.7 V
0 V
1.5 V
1.5 V
Input
1.5 V
Output
Control
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
1.5 V
1.5 V
3 V
0 V
1.5 V
VOL + 0.3 V
1.5 V
VOH – 0.3 V
0 V
2.7 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
6 V
GND
TEST
S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤
10 MHz, ZO = 50
, tr
≤
2.5 ns, tf
≤
2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
相關PDF資料 |
PDF描述 |
|---|---|
| SN54LVT652 | 3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS |
| SN54LVT8980 | EMBEDDED TEST-BUS CONTROLLERS IEEE STD 1149.1 JTAG TAP MASTERS WITH 8-BIT GENERIC HOST INTERFACES |
| SN74LVT8980FK | EMBEDDED TEST-BUS CONTROLLERS IEEE STD 1149.1 JTAG TAP MASTERS WITH 8-BIT GENERIC HOST INTERFACES |
| SN54LVT8980JT | EMBEDDED TEST-BUS CONTROLLERS IEEE STD 1149.1 JTAG TAP MASTERS WITH 8-BIT GENERIC HOST INTERFACES |
| SN54LVTH16245AWD | 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SN74LVT543DBR | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN74LVT543DW | 功能描述:總線收發(fā)器 3.3V ABT Octal Reg Trncvr W/3-St Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74LVT543DWR | 功能描述:總線收發(fā)器 3.3V ABT Octal Reg Trncvr W/3-St Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74LVT543PWLE | 制造商:Texas Instruments 功能描述: 制造商:Texas Instruments 功能描述:LVT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| SN74LVT543PWR | 功能描述:總線收發(fā)器 3.3V ABT Octal Reg Trncvr W/3-St Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復。