參數(shù)資料
型號: SN74LVC32ADB
廠商: Texas Instruments, Inc.
英文描述: QUADRUPLE 2-INPUT POSITIVE-OR GATES
中文描述: 四2輸入陽性或門
文件頁數(shù): 1/17頁
文件大?。?/td> 526K
代理商: SN74LVC32ADB
www.ti.com
FEATURES
Operate From 1.65 V to 3.6 V
Specified From –40°C to 85°C,
–40°C to 125°C, and –55°C to 125°C
Inputs Accept Voltages to 5.5 V
Max t
pd
of 3.8 ns at 3.3 V
Typical V
OLP
(Output Ground Bounce)
<0.8 V at V
CC
= 3.3 V, T
A
= 25°C
SN74LVC32A . . . RGY PACKAGE
(TOP VIEW)
1
14
7
8
2
3
4
5
6
13
12
11
10
9
4B
4A
4Y
3B
3A
1B
1Y
2A
2B
2Y
1
3
V
G
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
1Y
2A
2B
2Y
GND
V
CC
4B
4A
4Y
3B
3A
3Y
SN54LVC32A . . . J OR W PACKAGE
SN74LVC32A . . . D, DB, NS,
OR PW PACKAGE
(TOP VIEW)
3
2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
4A
NC
4Y
NC
3B
1Y
NC
2A
NC
2B
1
1
N
3
3
V
4
2
G
N
SN54LVC32A . . . FK PACKAGE
(TOP VIEW)
NC - No internal connection
DESCRIPTION/ORDERING INFORMATION
The SN54LVC32A quadruple 2-input positive-OR gate is designed for 2.7-V to 3.6-V V
operation, and the
SN74LVC32A quadruple 2-input positive-OR gate is designed for 1.65-V to 3.6-V V
CC
operation.
The 'LVC32A devices perform the Boolean function
Y
A
B or Y
A
B
in positive logic.
SN54LVC32A, SN74LVC32A
QUADRUPLE 2-INPUT POSITIVE-OR GATES
SCAS286P–JANUARY 1993–REVISED APRIL 2005
Typical V
OHV
(Output V
OH
Undershoot)
>2 V at V
CC
= 3.3 V, T
A
= 25°C
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
ORDERING INFORMATION
ORDERABLE
PART NUMBER
SN74LVC32ARGYR
SN74LVC32AD
SN74LVC32ADR
SN74LVC32ADT
SN74LVC32ANSR
SN74LVC32ADBR
SN74LVC32APW
SN74LVC32APWR
SN74LVC32APWT
SNJ54LVC32AJ
SNJ54LVC32AW
SNJ54LVC32AFK
TOP-SIDE
MARKING
T
A
PACKAGE
(1)
–40°C to 85°C
QFN – RGY
Reel of 1000
Tube of 50
Reel of 2500
Reel of 250
Reel of 2000
Reel of 2000
Tube of 90
Reel of 2000
Reel of 250
Tube of 25
Tube of 150
Tube of 55
LC32A
SOIC – D
LVC32A
SOP – NS
SSOP – DB
LVC32A
LC32A
–40°C to 125°C
TSSOP – PW
LC32A
CDIP – J
CFP – W
LCCC – FK
SNJ54LVC32AJ
SNJ54LVC32AW
SNJ54LVC32AFK
–55°C to 125°C
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright 1993–2005, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are
tested unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
相關PDF資料
PDF描述
SN54LVC373AFK Phase Locked Loop; Package: TSSOP-16; No of Pins: 16; Container: Tape and Reel; Qty per Container: 2500
SN54LVC373AJ Phase Locked Loop; Package: SOEIAJ-16; No of Pins: 16; Container: Rail; Qty per Container: 50
SN54LVC373AW Phase Locked Loop; Package: SOEIAJ-16; No of Pins: 16; Container: Tape and Reel; Qty per Container: 2000
SN74LVC373ADB OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
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