參數(shù)資料
型號(hào)： SN74BCT646DWRG4
廠商： Texas Instruments, Inc.
英文描述： OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
中文描述： 八路總線收發(fā)器和寄存器具有三態(tài)輸出
文件頁(yè)數(shù)： 1/18頁(yè)
文件大小： 361K
代理商： SN74BCT646DWRG4
SCBS037D AUGUST 1989 REVISED MAY 2004
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
State-of-the-Art BiCMOS Design
Significantly Reduces I
CCZ
Bus Transceivers/Registers
Independent Registers and Enables for
A and B Buses
Multiplexed Real-Time and Stored Data
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
CLKAB
SAB
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
V
CC
CLKBA
SBA
OE
B1
B2
B3
B4
B5
B6
B7
B8
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
SN54BCT646 . . . JT OR W PACKAGE
SN74BCT646 . . . DW OR NT PACKAGE
(TOP VIEW)
5
6
7
8
9
10
11
25
24
23
22
21
20
19
4
3
2
1 28
12 13 14 15 16
OE
B1
B2
NC
B3
B4
B5
A1
A2
A3
NC
A4
A5
A6
SN54BCT646 . . . FK PACKAGE
(TOP VIEW)
D
S
C
B
B
A
G
N
N
C
S
V
A
B
17 18
27 26
NC No internal connection
description/ordering information
These devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed
transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked
into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1
illustrates the four fundamental bus-management functions that can be performed with the ’BCT646 devices.
Output-enable (OE) and direction-control (DIR) inputs are provided to control the transceiver functions. In the
transceiver mode, data present at the high-impedance port can be stored in either register or in both.
The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The
direction control (DIR) determines which bus will receive data when OE is low. In the isolation mode (OE high),
A data can be stored in one register and/or B data can be stored in the other register.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP NT
Tube
SN74BCT646NT
SN74BCT646NT
0 C to 70 C
SOIC DW
Tube
SN74BCT646DW
BCT646
Tape and reel
SN74BCT646DWR
CDIP JT
Tube
SNJ54BCT646JT
SNJ54BCT646JT
55 C to 125 C
CFP W
LCCC FK
Tube
Tube
SNJ54BCT646W
SNJ54BCT646FK
SNJ54BCT646W
SNJ54BCT646FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright
2004, Texas Instruments Incorporated
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SN74BCT646NT 功能描述:總線收發(fā)器 Octal Bus Transcvr and Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74BCT646NTE4 功能描述:總線收發(fā)器 Octal Bus Transcvr and Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74BCT648DW 制造商:Rochester Electronics LLC 功能描述:- Bulk
SN74BCT648NT 制造商:Rochester Electronics LLC 功能描述:- Bulk
SN74BCT652DW 功能描述:總線收發(fā)器 Octal Bus Transcvrs & Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
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