參數(shù)資料
型號(hào): SN74AVC16373DGG
廠商: Texas Instruments, Inc.
英文描述: 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
中文描述: 16位透明D型鎖存器三態(tài)輸出
文件頁數(shù): 1/11頁
文件大?。?/td> 167K
代理商: SN74AVC16373DGG
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN74AVC16373
16-BIT TRANSPARENT D-TYPE LATCH
WITH 3-STATE OUTPUTS
SCES156F – DECEMBER 1998 – REVISED FEBRUARY 2000
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Member of the Texas Instruments
Widebus
Family
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
DOC
(Dynamic Output Control) Circuit
Dynamically Changes Output Impedance,
Resulting in Noise Reduction Without
Speed Degradation
Dynamic Drive Capability Is Equivalent to
Standard Outputs With I
OH
and I
OL
of
±
24 mA at 2.5-V V
CC
Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
I
off
Supports Partial-Power-Down Mode
Operation
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
Package Options Include Plastic Thin
Shrink Small-Outline (DGG) and Thin Very
Small-Outline (DGV) Packages
description
A Dynamic Output Control (DOC) circuit is implemented, which, during the transition, initially lowers the output
impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1
shows typical V
OL
vs I
OL
and V
OH
vs I
OH
curves to illustrate the output impedance and drive capability of the
circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is
equivalent to a high-drive standard-output device. For more information, refer to the TI application reports, AVC
Logic Family Technology and Applications literature number SCEA006, and Dynamic Output Control (DOC
)
Circuitry Technology and Applications literature number SCEA009.
136
–128
–144
–160
0.4
0.8
1.2
1.6
2.0
2.4
2.8
170
153
119
102
85
68
51
34
17
0
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
TA = 25
°
C
Process = Nominal
IOL – Output Current – mA
VCC = 3.3 V
VCC = 2.5 V
VCC = 1.8 V
O
V
TA = 25
°
C
Process = Nominal
IOH – Output Current – mA
VCC = 3.3 V
VCC = 2.5 V
VCC = 1.8 V
O
V
–80
–96
–112
–32
–48
–64
0
–16
Figure 1. Output Voltage vs Output Current
This 16-bit transparent D-type latch is operational at 1.2-V to 3.6-V V
CC
, but is designed specifically for 1.65-V
to 3.6-V V
CC
operation.
The SN74AVC16373 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus
drivers, and working registers. This device can be used as two 8-bit latches or one 16-bit latch. When the
latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs
are latched at the levels set up at the D inputs.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
2000, Texas Instruments Incorporated
DOC, EPIC, and Widebus are trademarks of Texas Instruments Incorporated.
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