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參數資料
| 型號： | SN74AUP1G58YEPR |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE |
| 中文描述： | 低功耗可配置多功能的門 |
| 文件頁數： | 1/11頁 |
| 文件大?。?/td> | 225K |
| 代理商： | SN74AUP1G58YEPR |
SCES590 JULY 2004
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Available in the Texas Instruments
NanoStar
and NanoFree
Packages
Low Static-Power Consumption;
I
CC
= 0.9
μ
A Max
Low Dynamic-Power Consumption;
C
pd
= 1 pF Typ at 3.3 V
Low Input Capacitance; C
i
= 1.5 pF Typ
Low Noise Overshoot and Undershoot
<
10% of V
CC
I
off
Supports Partial-Power-Down Mode
Operation
Input Hysteresis Allows Slow Input
Transition and Better Switching Noise
Immunity at the Input
(V
hys
= 250 mV Typ at 3.3 V)
Wide Operating V
CC
Range of 0.8 V to 3.6 V
Optimized for 3.3-V Operation
3.6-V I/O Tolerant to Support Mixed-Mode
Signal Operation
t
pd
= 3.6 ns Max at 3.3 V
Suitable for Point-to-Point Applications
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
2000-V Human-Body Model
(A114-B, Class II)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
ESD Protection Exceeds
±
5000 V With
Human-Body Model
DBV OR DCK PACKAGE
(TOP VIEW)
1
2
3
5
4
NC
A
GND
V
CC
Y
3
2
1
4
5
GND
A
DNU
Y
V
CC
YEP OR YZP PACKAGE
(BOTTOM VIEW)
NC No internal connection
DNU Do not use
description/ordering information
The AUP family is TI’s premier solution to the industry’s low power needs in battery-powered portable
applications. This family ensures a very low static and dynamic power consumption across the entire V
CC
range
of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see
Figures 1 and 2).
Figure 1. AUP The Lowest-Power Family
AUP
Logic
AUP
Static-Power Consumption
(
μ
A)
Dynamic-Power Consumption
(pF)
Single, dual, and triple gates
3.3-V
Logic
3.3-V
0%
20%
40%
60%
80%
100%
0%
20%
40%
60%
80%
100%
0.5
0
0.5
1
1.5
2
2.5
3
3.5
0
5
10
15
20
Time ns
25
30
35
40
45
Figure 2. Excellent Signal Integrity
V
AUP1G08 data at CL = 15 pF
Output
Input
Switching Characteristics
at 25 MHz
The output of this single inverter buffer/driver is open drain, and can be connected to other open-drain outputs
to implement active-low wired-OR or active-high wired-AND functions.
Copyright
2004, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SN74AUP1G58YFPR | 功能描述:邏輯門 Lo-Pwr Config Mult- Function Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74AUP1G58YZPR | 功能描述:邏輯門 LoPwrCnfgrble MultFunctionGt RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74AUP1G58YZTR | 功能描述:邏輯門 Lo-Pwr Config Mult- Function Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74AUP1G74DCUR | 功能描述:觸發(fā)器 LoPwSnglPosEdgTrggrd DTypeFlipFlop RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74AUP1G74DCUR | 制造商:Texas Instruments 功能描述:IC D-TYPE FLIP FLOP SGL 2NS VSSOP-8 制造商:Texas Instruments 功能描述:IC, D-TYPE FLIP FLOP, SGL, 2NS, VSSOP-8 |
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