參數(shù)資料
型號(hào): SN74AUP1G06DRLR
廠商: TEXAS INSTRUMENTS INC
元件分類: 門電路
英文描述: AUP/ULP/V SERIES, 1-INPUT INVERT GATE, PDSO5
封裝: GREEN, PLASTIC, SOT-553, 5 PIN
文件頁(yè)數(shù): 1/23頁(yè)
文件大?。?/td> 1024K
代理商: SN74AUP1G06DRLR
DBV PACKAGE
(TOP VIEW)
5
1
V
CC
N.C.
2
A
3
4
GND
Y
DCK PACKAGE
(TOP VIEW)
2
A
3
4
GND
V
CC
5
N.C.
Y
1
YFP PACKAGE
(TOP VIEW)
A
V
CC
GND
Y
DRY PACKAGE
(TOP VIEW)
A
N.C.
6
5
4
2
3
GND
Y
V
CC
1
GND
Y
3
4
A
2
5
N.C.
6
1
N.C.
V
CC
DSF PACKAGE
(TOP VIEW)
4
2
1
A1
B1
A2
3 B2
www.ti.com
SCES590D – JULY 2004 – REVISED MAY 2010
LOW-POWER SINGLE INVERTER BUFFER/DRIVER
WITH OPEN-DRAIN OUTPUTS
Check for Samples: SN74AUP1G06
1
FEATURES
Available in the Texas Instruments NanoStar
Input (Vhys = 250 mV Typ at 3.3 V)
Package
Wide Operating VCC Range of 0.8 V to 3.6 V
Low Static-Power Consumption
Optimized for 3.3-V Operation
(ICC = 0.9 mA Max)
3.6-V I/O Tolerant to Support Mixed-Mode
Low Dynamic-Power Consumption
Signal Operation
(Cpd = 1 pF Typ at 3.3 V)
tpd = 3.6 ns Max at 3.3 V
Low Input Capacitance (Ci = 1.5 pF Typ)
Suitable for Point-to-Point Applications
Low Noise – Overshoot and Undershoot <10%
Latch-Up Performance Exceeds 100 mA Per
of VCC
JESD 78, Class II
Ioff Supports Partial Power-Down-Mode
ESD Performance Tested Per JESD 22
Operation
2000-V Human-Body Model
Input Hysteresis Allows Slow Input Transition
(A114-B, Class II)
and Better Switching Noise Immunity at the
1000-V Charged-Device Model (C101)
See mechanical drawings for dimensions.
N.C. – No internal connection
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 2004–2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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