參數(shù)資料
型號: SN74ALVCH16835DGV
廠商: Texas Instruments, Inc.
英文描述: 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
中文描述: 18位通用總線驅(qū)動(dòng)器,三態(tài)輸出
文件頁數(shù): 1/10頁
文件大?。?/td> 135K
代理商: SN74ALVCH16835DGV
SN74ALVCH16835
18-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
SCES053E – SEPTEMBER 1995 – REVISED FEBRUARY 1999
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Member of the Texas Instruments
Widebus
Family
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Package Options Include Plastic Shrink
Small-Outline (DL), Thin Shrink
Small-Outline (DGG), and Thin Very
Small-Outline (DGV) Packages
description
This 18-bit universal bus driver is designed for
1.65-V to 3.6-V V
CC
operation.
Data flow from A to Y is controlled by the
output-enable (OE) input. The device operates in
the transparent mode when the latch-enable (LE)
input is high. The A data is latched if the clock
(CLK) input is held at a high or low logic level. If LE
is low, the A data is stored in the latch/flip-flop on
the low-to-high transition of CLK. When OE is
high, the outputs are in the high-impedance state.
To ensure the high-impedance state during power
up or power down, OE should be tied to V
CC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
Active bus-hold circuitry is provided to hold
unused or floating data inputs at a valid logic level.
The SN74ALVCH16835 is characterized for
operation from –40
°
C to 85
°
C.
Copyright
1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
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NC
NC
Y1
GND
Y2
Y3
V
CC
Y4
Y5
Y6
GND
Y7
Y8
Y9
Y10
Y11
Y12
GND
Y13
Y14
Y15
V
CC
Y16
Y17
GND
Y18
OE
LE
GND
NC
A1
GND
A2
A3
V
CC
A4
A5
A6
GND
A7
A8
A9
A10
A11
A12
GND
A13
A14
A15
V
CC
A16
A17
GND
A18
CLK
GND
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
NC – No internal connection
相關(guān)PDF資料
PDF描述
SN74ALVCH16835DL 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16836 20-Bit Universal Bus Transceivers With 3-State Outputs(20位通用總線驅(qū)動(dòng)器(三態(tài)輸出))
SN74ALVCH16841DGG 20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS
SN74ALVCH16843 18-Bit Bus-Interface Flip-Flops(18位總線接口觸發(fā)器(三態(tài)輸出))
SN74ALVCH16863DGG 18-BIT TRANSCEIVER WITH 3-STATE OUTPUTS
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SN74ALVCH16835DLR 功能描述:總線收發(fā)器 18bit Univ Bus RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74ALVCH16835KR 功能描述:總線收發(fā)器 18bit Univ Bus RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
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