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參數(shù)資料
| 型號： | SN65LVDT2DBV |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | HIGH-SPEED DIFFERENTIAL LINE RECEIVER |
| 中文描述： | 高速差分線路接收器 |
| 文件頁數(shù)： | 8/10頁 |
| 文件大?。?/td> | 133K |
| 代理商： | SN65LVDT2DBV |
SN65LVDT2
HIGH-SPEED DIFFERENTIAL LINE RECEIVER
SLLS374B – JULY 1999 – REVISED JANUARY 2000
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
fail safe
One of the most common problems with differential signaling applications is how the system responds when
no differential voltage is present on the signal pair. The LVDS receiver is like most differential line receivers, in
that its output logic state can be indeterminate when the differential input voltage is between –100 mV and 100
mV and within its recommended input common-mode voltage range. TI’s LVDS receiver is different in how it
handles the open-input circuit situation, however.
Open-circuit means that there is little or no input current to the receiver from the data line itself. This could be
when the driver is in a high-impedance state or the cable is disconnected. When this occurs, the LVDS receiver
will pull each line of the signal pair to near V
CC
through 300-k
resistors as shown in Figure 10. The fail-safe
feature uses an AND gate with input voltage thresholds at about 2.3 V to detect this condition and force the
output to a high-level regardless of the differential input voltage.
Rt = 100
(Typ)
300 k
300 k
VCC
VIT
≈
2.3 V
A
B
Y
Figure 8. Open-Circuit Fail Safe of the LVDS Receiver
It is only under these conditions that the output of the receiver will be valid with less than a 100 mV differential
input voltage magnitude. The presence of the termination resistor, Rt, does not affect the fail-safe function as
long as it is connected as shown in the figure. Other termination circuits may allow a dc current to ground that
could defeat the pullup currents from the receiver and the fail-safe feature.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SN65LVDT2DBVR | 功能描述:LVDS 接口集成電路 High Speed Diff Line RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| SN65LVDT2DBVR | 制造商:Texas Instruments 功能描述:Line Receiver IC |
| SN65LVDT2DBVRG4 | 功能描述:LVDS 接口集成電路 DUAL LVDS RECEIVER RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| SN65LVDT2DBVT | 功能描述:LVDS 接口集成電路 Dual LVDS RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| SN65LVDT2DBVTG4 | 功能描述:LVDS 接口集成電路 DUAL LVDS RECEIVER RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
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