參數(shù)資料
型號: SN65LVDT2DBV
廠商: Texas Instruments, Inc.
英文描述: HIGH-SPEED DIFFERENTIAL LINE RECEIVER
中文描述: 高速差分線路接收器
文件頁數(shù): 4/10頁
文件大小: 133K
代理商: SN65LVDT2DBV
SN65LVDT2
HIGH-SPEED DIFFERENTIAL LINE RECEIVER
SLLS374B – JULY 1999 – REVISED JANUARY 2000
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating conditions, V
CC
= 3 V to 3.6 V (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
100
UNIT
VITH+
VITH–
VOH
VOL
Positive-going differential input voltage threshold
See Figure 2 and Table 1
mV
Negative-going differential input voltage threshold
–100
High-level output voltage
IOH = –8 mA
IOL = 8 mA
No load,
Steady state
2.4
3
V
Low-level output voltage
0.25
0.4
V
ICC
Supply current
5
8
mA
II
Input current (A or B inputs)
VI = 0 V,
Other input open
±
40
μ
A
VI = 2.4 V,
Other input open
–2.4
IID
Differential input current (IIA – IIB)
VIA = 0.4 V, VIB = 0 V
VIA = 2.4 V, VIB = 2 V
VCC = 0 V,
VI = 2.4 V,
Other input open
3
3.6
4.4
mA
II(OFF)
Power-off input current (A or B inputs)
40
μ
A
All typical values are at 25
°
C and with a 3.3-V supply.
receiver switching characteristics over recommended operating conditions, V
CC
= 3 V to 3.6 V
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
1.4
TYP
2.6
MAX
3.1
UNIT
ns
tPLH
tPHL
tsk(p)
tr
tf
All typical values are at 25
°
C and with a 3.3-V.
tsk(p) is the magnitude of the time difference between the high-to-low and low-to-high propagation delay times at an output.
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Pulse skew (|tpHL – tpLH|)
Output signal rise time
CL = 10 pF,
See Figure 3
10 F
1.4
2.5
3.1
ns
0.1
0.5
ns
0.7
1.1
ns
Output signal fall time
0.7
1.1
ns
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