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參數(shù)資料
| 型號： | SN54LVTH273 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Octal D-Type 3-State Noninverting Flip-Flop; Package: SOIC-20 WB; No of Pins: 20; Container: Rail; Qty per Container: 38 |
| 中文描述： | 的3.3V ABT生根粉八路D型倒裝，沒有明確的觸發(fā)器 |
| 文件頁數(shù)： | 4/13頁 |
| 文件大小： | 315K |
| 代理商： | SN54LVTH273 |
SCBS136M MAY 1992 REVISED OCTOBER 2003
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54LVTH273
MIN
TYP
SN74LVTH273
MIN
TYP
UNIT
MAX
MAX
VIK
VCC = 2.7 V,
VCC = 2.7 V to 3.6 V,
VCC = 2.7 V,
II = 18 mA
IOH = 100
μ
A
IOH = 8 mA
IOH = 24 mA
IOH = 32 mA
IOL = 100
μ
A
IOL = 24 mA
IOL = 16 mA
IOL = 32 mA
IOL = 48 mA
IOL = 64 mA
VI = 5.5 V
VI = VCC or GND
VI = VCC
VI = 0
VI or VO = 0 to
4.5 V
VI = 0.8 V
VI = 2 V
1.2
1.2
V
VCC0.2
2.4
VCC0.2
2.4
VOH
V
VCC = 3 V
2
2
VCC = 2.7 V
0.2
0.2
0.5
0.5
VOL
0.4
0.4
V
VCC = 3 V
0.5
0.5
0.55
0.55
VCC = 0 or 3.6 V,
VCC = 3.6 V,
10
±
1
1
10
±
1
1
II
Control inputs
Data inputs
VCC = 3.6 V
μ
A
5
5
Ioff
VCC = 0,
±
100
μ
A
VCC = 3 V
75
75
II(hold)
Data inputs
75
75
A
μ
VCC = 3.6 V,
VI = 0 to 3.6 V
500
750
ICC
VCC = 3.6 V, IO = 0,
VI = VCC or GND
VCC = 3 V to 3.6 V, One input at VCC 0.6 V,
Other inputs at VCC or GND
VI = 3 V or 0
Outputs high
0.19
0.19
mA
Outputs low
5
5
ICC§
0.2
0.2
mA
Ci
4
4
pF
All typical values are at VCC = 3.3 V, TA = 25
°
C.
This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another.
§This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 1)
SN54LVTH273
VCC = 3.3 V
±
0.3 V
SN74LVTH273
VCC = 3.3 V
±
0.3 V
VCC = 2.7 V
VCC = 2.7 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
fclock
tw
Clock frequency
150
150
MHz
Pulse duration
3.3
3.3
3.3
3.3
ns
tsu
Setup time
Data high or low before CLK
↑
CLR high before CLK
↑
2.3
2.7
2.3
2.7
ns
2.3
2.7
2.3
2.7
th
Hold time, data high or low after CLK
↑
0
0
0
0
ns
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