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參數(shù)資料
| 型號： | SNJ54LVTH273J |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Tuning Diode (dual, common cathode) SOT23 20V ; Package: SOT-23 (TO-236) 3 LEAD; No of Pins: 3; Container: Tape and Reel; Qty per Container: 3000 |
| 中文描述： | 的3.3V ABT生根粉八路D型倒裝，沒有明確的觸發(fā)器 |
| 文件頁數(shù)： | 1/13頁 |
| 文件大?。?/td> | 315K |
| 代理商： | SNJ54LVTH273J |
SCBS136M MAY 1992 REVISED OCTOBER 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Support Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V V
CC
)
Typical V
OLP
(Output Ground Bounce)
<0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
Support Unregulated Battery Operation
Down To 2.7 V
Buffered Clock and Direct-Clear Inputs
Individual Data Input to Each Flip-Flop
I
off
Supports Partial-Power-Down-Mode
Operation
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Latch-Up Performance Exceeds 500 mA Per
JESD 17
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
SN54LVTH273 . . . J PACKAGE
SN74LVTH273 . . . DB, DW, NS, OR PW PACKAGE
(TOP VIEW)
SN54LVTH273 . . . FK PACKAGE
(TOP VIEW)
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
2D
2Q
3Q
3D
4D
1
1
C
5
5
8
4
G
C
V
C
8D
7D
7Q
6Q
6D
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
CLR
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
description/ordering information
These octal D-type flip-flops are designed specifically for low-voltage (3.3-V) V
CC
operation, but with the
capability to provide a TTL interface to a 5-V system environment.
The ’LVTH273 devices are positive-edge-triggered flip-flops with a direct-clear input. Information at the data (D)
inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going
edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the
transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the
D-input signal has no effect at the output.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SOIC DW
Tube
SN74LVTH273DW
LVTH273
Tape and reel
SN74LVTH273DWR
40
°
C to 85
°
C
SOP NS
Tape and reel
SN74LVTH273NSR
LVTH273
SSOP DB
Tape and reel
SN74LVTH273DBR
LXH273
TSSOP PW
Tube
SN74LVTH273PW
LXH273
Tape and reel
SN74LVTH273PWR
55
°
C to 125
°
C
CDIP J
Tube
SNJ54LVTH273J
SNJ54LVTH273J
LCCC FK
Tube
SNJ54LVTH273FK
SNJ54LVTH273FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright
2003, Texas Instruments Incorporated
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN74LVTH2952DB | 3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS |
| SN54LVTH2952 | Octal D-Type 3-State Noninverting Flip-Flop; Package: SOEIAJ-20; No of Pins: 20; Container: Rail; Qty per Container: 40 |
| SN54LVTH2952FK | Octal D-Type 3-State Noninverting Flip-Flop; Package: SOEIAJ-20; No of Pins: 20; Container: Tape and Reel; Qty per Container: 2000 |
| SN54LVTH2952JT | Octal D-Type 3-State Noninverting Flip-Flop; Package: SOEIAJ-20; No of Pins: 20; Container: Tape and Reel; Qty per Container: 2000 |
| SN74LVTH2952DGV | 3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS |
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