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參數(shù)資料
| 型號(hào)： | SN54LVTH182516 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 3.3-V ABT Scan Test Device With 18-Bit Universal Bus Transceivers(3.3VABT掃描測(cè)試裝置(18位通用總線收發(fā)器)) |
| 中文描述： | 的3.3V ABT生根粉掃描測(cè)試設(shè)備與18位通用總線收發(fā)器（3.3VABT掃描測(cè)試裝置（18位通用總線收發(fā)器）） |
| 文件頁(yè)數(shù)： | 1/36頁(yè) |
| 文件大?。?/td> | 769K |
| 代理商： | SN54LVTH182516 |
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SN54LVTH18516, SN54LVTH182516, SN74LVTH18516, SN74LVTH182516
3.3-V ABT SCAN TEST DEVICES
WITH 18-BIT UNIVERSAL BUS TRANSCEIVERS
SCBS672B – AUGUST 1996 – REVISED JUNE 1997
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Members of the Texas Instruments
SCOPE
Family of Testability Products
Members of the Texas Instruments
Widebus
Family
State-of-the-Art 3.3-V ABT Design Supports
Mixed-Mode Signal Operation (5-V Input
and Output Voltages With 3.3-V V
CC
)
Support Unregulated Battery Operation
Down to 2.7 V
UBT
(Universal Bus Transceiver)
Combines D-Type Latches and D-Type
Flip-Flops for Operation in Transparent,
Latched, or Clocked Mode
Provide Multiplexed Transmission of
Stored and Real-Time Data
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
B-Port Outputs of
’
LVTH182516 Devices
Have Equivalent 25-
Series Resistors, So
No External Resistors Are Required
Compatible With the IEEE Std 1149.1-1990
(JTAG) Test Access Port and
Boundary-Scan Architecture
SCOPE
Instruction Set
– IEEE Std 1149.1-1990 Required
Instructions and Optional CLAMP and
HIGHZ
– Parallel-Signature Analysis at Inputs
– Pseudo-Random Pattern Generation
From Outputs
– Sample Inputs/Toggle Outputs
– Binary Count From Outputs
– Device Identification
– Even-Parity Opcodes
Package Options Include 64-Pin Plastic
Thin Shrink Small-Outline (DGG), 64-Pin
Ceramic Dual Flat (HKC), and 68-Pin
Ceramic Quad Flat (HV) Packages
Copyright
1997, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC, Widebus, SCOPE, and UBT are trademarks of Texas Instruments Incorporated.
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LEBA
OEBA
NC
A1
A2
GND
A3
A4
A5
V
CC
A6
A7
A8
GND
A9
A10
A11
A12
GND
A13
A14
A15
V
CC
A16
A17
A18
GND
SAB
CLKENAB
CLKAB
TDO
TMS
CLKBA
CLKENBA
SBA
B1
B2
GND
B3
B4
B5
V
CC
B6
B7
B8
GND
B9
B10
B11
B12
GND
B13
B14
B15
V
CC
B16
B17
B18
GND
NC
OEAB
LEAB
TDI
TCK
SN54LVTH18516, SN54LVTH182516 . . . HKC PACKAGE
SN74LVTH18516, SN74LVTH182516 . . . DGG PACKAGE
(TOP VIEW)
NC – No internal connection
P
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN74LVTH182516 | 3.3-V ABT Scan Test Device With 18-Bit Universal Bus Transceivers(3.3V ABT掃描測(cè)試裝置(18位通用總線收發(fā)器)) |
| SN54LVTH18640 | 3.3-V ABT Scan Test Device With 18-Bit Inverting Bus Transceivers(3.3V ABT 掃描檢測(cè)裝置(18位反相總線收發(fā)器)) |
| SN54LVTH182640 | 3.3-V ABT Scan Test Device With 18-Bit Inverting Bus Transceivers(3.3V ABT 掃描檢測(cè)裝置(18位反相總線收發(fā)器)) |
| SN74LVTH182640 | 3.3-V ABT Scan Test Device With 18-Bit Inverting Bus Transceivers(3.3V ABT 掃描檢測(cè)裝置(18位反相總線收發(fā)器)) |
| SN74LVTH18640 | 3.3-V ABT Scan Test Device With 18-Bit Inverting Bus Transceivers(3.3V ABT 掃描檢測(cè)裝置(18位反相總線收發(fā)器)) |
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