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參數(shù)資料
| 型號： | SN54LVC14AJ |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | Monolithic WFR, Binary Counter; Package: PDIP-16; No of Pins: 16; Container: Tape and Ammunition Box; Qty per Container: 500 |
| 中文描述： | 六角施密特觸發(fā)器逆變器 |
| 文件頁數(shù)： | 2/19頁 |
| 文件大小： | 552K |
| 代理商： | SN54LVC14AJ |
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The devices contain six independent inverters and perform the Boolean function Y = A.
Y
A
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
SN54LVC14A, SN74LVC14A
HEX SCHMITT-TRIGGER INVERTERS
SCAS285X–MARCH 1993–REVISED JULY 2005
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
FUNCTION TABLE
(EACH INVERTER)
INPUT
A
H
L
OUTPUT
Y
L
H
logic diagram, each inverter (positive logic)
MIN
–0.5
–0.5
–0.5
MAX
6.5
6.5
UNIT
V
V
V
mA
mA
mA
mA
V
CC
V
I
V
O
I
IK
I
OK
I
O
Supply voltage range
Input voltage range
(2)
Output voltage range
(2)(3)
Input clamp current
Output clamp current
Continuous output current
Continuous current through V
CC
or GND
V
CC
+ 0.5
V
I
< 0
V
O
< 0
–50
–50
±
50
±
100
D package
(4)
DB package
(4)
DGV package
(4)
NS package
(4)
PW package
(4)
RGY package
(5)
86
96
127
76
113
47
150
500
θ
JA
Package thermal impedance
°
C/W
T
stg
P
tot
Storage temperature range
Power dissipation
–65
°
C
mW
T
A
= –40
°
C to 125
°
C
(6)(7)
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
The value of V
is provided in the recommended operating conditions table.
The package thermal impedance is calculated in accordance with JESD 51-7.
The package thermal impedance is calculated in accordance with JESD 51-5.
For the D package: above 70
°
C, the value of P
derates linearly with 8 mW/K.
For the DB, DGV, NS, and PW packages: above 60
°
C, the value of P
tot
derates linearly with 5.5 mW/K.
(2)
(3)
(4)
(5)
(6)
(7)
2
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