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參數(shù)資料
| 型號： | SN54LV573AJ |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Octal 3-State Non-Inverting Transparent Latch; Package: TSSOP 20 LEAD; No of Pins: 20; Container: Tape and Reel; Qty per Container: 2500 |
| 中文描述： | 八路透明D類鎖存器具有三態(tài)輸出 |
| 文件頁數(shù)： | 5/19頁 |
| 文件大?。?/td> | 595K |
| 代理商： | SN54LV573AJ |
SCLS411I APRIL 1998 REVISED APRIL 2005
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range, V
CC
= 2.5 V
±
0.2 V
(unless otherwise noted) (see Figure 1)
PARAMETER
TA = 25
°
C
MIN
SN54LV573A
MIN
SN74LV573A
MIN
UNIT
MAX
MAX
MAX
tw
tsu
th
Pulse duration
LE high
6.5
6.5
6.5
ns
Setup time
Data before LE
↓
5
5
5
ns
Hold time
Data after LE
↓
2
2
2
ns
timing requirements over recommended operating free-air temperature range, V
CC
= 3.3 V
±
0.3 V
(unless otherwise noted) (see Figure 1)
PARAMETER
TA = 25
°
C
MIN
5
SN54LV573A
SN74LV573A
UNIT
MAX
MIN
MAX
MIN
MAX
tw
tsu
th
Pulse duration
LE high
5
5
ns
Setup time
Data before LE
↓
3.5
3.5
3.5
ns
Hold time
Data after LE
↓
1.5
1.5
1.5
ns
timing requirements over recommended operating free-air temperature range, V
CC
= 5 V
±
0.5 V
(unless otherwise noted) (see Figure 1)
PARAMETER
TA = 25
°
C
MIN
SN54LV573A
MIN
SN74LV573A
MIN
UNIT
MAX
MAX
MAX
tw
tsu
th
Pulse duration
LE high
5
5
5
ns
Setup time
Data before LE
↓
3.5
3.5
3.5
ns
Hold time
Data after LE
↓
1.5
1.5
1.5
ns
switching characteristics over recommended operating free-air temperature range,
V
CC
= 2.5 V
±
0.2 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
LOAD
TA = 25
°
C
TYP
SN54LV573A
MIN
SN74LV573A
MIN
UNIT
(OUTPUT)
CAPACITANCE
MIN
MAX
MAX
MAX
tpd
D
Q
8.9*
15.8*
1*
18*
1
18
LE
Q
CL = 15 pF
9.6*
16.2*
1*
19*
1
19
ns
ten
tdis
OE
Q
9.3*
16.2*
1*
19*
1
19
OE
Q
6.7*
12.6*
1*
15*
1
15
tpd
D
Q
10.9
18.7
1
21
1
21
LE
Q
11.6
19.1
1
23
1
23
ten
tdis
tsk(o)
OE
Q
CL = 50 pF
11.4
19
1
22
1
22
ns
OE
Q
8.6
17.3
1
19
1
19
2
2
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
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