參數(shù)資料
型號: SN54LV4052AW
廠商: Texas Instruments, Inc.
英文描述: Octal D-Type Flip-Flop; Package: 20 LEAD PDIP; No of Pins: 20; Container: Rail; Qty per Container: 18
中文描述: 雙4通道模擬多路復(fù)用器/解復(fù)用器
文件頁數(shù): 3/20頁
文件大?。?/td> 558K
代理商: SN54LV4052AW
SCLS429H MAY 1999 REVISED APRIL 2005
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
Input voltage range, V
I
(see Note 1)
Switch I/O voltage range, V
IO
(see Notes 1 and 2)
Input clamp current, I
IK
(V
I
< 0)
I/O diode current, I
IOK
(V
IO
< 0)
Switch through current, I
T
(V
IO
= 0 to V
CC
)
Continuous current through V
CC
or GND
Package thermal impedance,
θ
JA
(see Note 3): D package
0.5 V to 7.0 V
0.5 V to 7.0 V
0.5 V to V
CC
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): DB package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): DGV package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): N package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): NS package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): PW package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 4): RGY package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4. The package thermal impedance is calculated in accordance with JESD 51-5.
20 mA
50 mA
±
25 mA
±
50 mA
73
°
C/W
82
°
C/W
120
°
C/W
67
°
C/W
64
°
C/W
108
°
C/W
39
°
C/W
65
°
C to 150
°
C
recommended operating conditions (see Note 5)
SN54LV4052A
MIN
2
SN74LV4052A
MIN
2
UNIT
MAX
MAX
VCC
Supply voltage
5.5
5.5
V
VCC = 2 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 2 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
1.5
1.5
VIH
High-level input voltage,
control inputs
VCC
×
0.7
VCC
×
0.7
VCC
×
0.7
VCC
×
0.7
VCC
×
0.7
VCC
×
0.7
V
0.5
0.5
VIL
Low-level input voltage,
control inputs
VCC
×
0.3
VCC
×
0.3
VCC
×
0.3
VCC
×
0.3
VCC
×
0.3
VCC
×
0.3
V
VI
VIO
Control input voltage
0
5.5
0
5.5
V
Input/output voltage
0
VCC
200
0
VCC
200
V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
t/
v
Input transition rise or fall rate
100
100
ns/V
20
20
TA
Operating free-air temperature
With supply voltages at or near 2 V, the analog switch on-state resistance becomes very nonlinear. It is recommended that only digital signals
be transmitted at these low supply voltages.
NOTE 5: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
55
125
40
85
°
C
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