參數(shù)資料
型號(hào)： SN54BCT8374AFK
廠商： Texas Instruments, Inc.
英文描述： SCAN TEST DEVICES WITH OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
中文描述： 掃描測(cè)試設(shè)備與八路D型邊沿觸發(fā)觸發(fā)器
文件頁(yè)數(shù)： 18/26頁(yè)
文件大?。?/td> 474K
代理商： SN54BCT8374AFK
SN54BCT8374A, SN74BCT8374A
SCAN TEST DEVICES
WITH OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
SCBS045E – JUNE 1990 – REVISED JULY 1996
18
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (normal mode) (see Figure 9)
VCC = 5 V,
TA = 25
°
C
MIN
SN54BCT8374A
SN74BCT8374A
UNIT
MAX
MIN
MAX
MIN
MAX
fclock
tw
tsu
th
Clock frequency
CLK
0
70
0
70
0
70
MHz
Pulse duration
CLK high or low
Data before CLK
↑
Data after CLK
↑
5
5
5
ns
Setup time
3
3
3
ns
Hold time
2
2
2
ns
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (test mode) (see Figure 9)
VCC = 5 V,
TA = 25
°
C
MIN
SN54BCT8374A
SN74BCT8374A
UNIT
MAX
MIN
MAX
MIN
MAX
fclock
Clock frequency
TCK
0
20
0
20
0
20
MHz
tw
Pulse duration
TCK high or low
25
25
25
ns
TMS double high
Any D before TCK
↑
CLK or OE before TCK
↑
TDI before TCK
↑
TMS before TCK
↑
Any D after TCK
↑
CLK or OE after TCK
↑
TDI after TCK
↑
TMS after TCK
↑
Power up to TCK
↑
50*
50*
50
6
6
6
tsu
Setup time
6
6
6
ns
6
6
6
12
12
12
4.5
4.5
4.5
th
Hold time
4.5
4.5
4.5
ns
4.5
4.5
4.5
0
0
0
td
Delay time
100*
100*
100
ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
相關(guān)PDF資料
PDF描述
SN54BCT8374AJT SCAN TEST DEVICES WITH OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
SN74BCT8374ANT SCAN TEST DEVICES WITH OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
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