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參數資料
| 型號： | SN54AS138FKR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 編、解碼器及復用、解復用 |
| 英文描述： | AS SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CQCC20 |
| 封裝： | CERAMIC, LCC-20 |
| 文件頁數： | 1/5頁 |
| 文件大小： | 83K |
| 代理商： | SN54AS138FKR |
SN54ALS138, SN54AS138, SN74ALS138A, SN74AS138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SDAS055C – APRIL 1982 – REVISED FEBRUARY 1994
Copyright
1994, Texas Instruments Incorporated
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Designed Specifically for High-Speed
Memory Decoders and Data Transmission
Systems
Incorporates 3 Enable inputs to Simplify
Cascading and/or Data Reception
Package Options include Plastic Small-
Outline Packages, Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mil
DIPs
description
The 54ALS138, 74ALS138A, and
′AS138 circuits
are designed to be used in high-performance
memory-decoding or data-routing applications
requiring very short propagation delay times. In
high-performance memory systems, this decoder
can be used to minimize the effects of system
decoding. When employed with high-speed
memories with a fast enable circuit, the delay
times of this decoder and the enable time of the
memory are usually less than the typical access
time of the memory. This means that the effective
system delay introduced by the Schottky-clamped
system decoder is negligible.
The conditions at the binary select inputs and the
three enable inputs select one of eight input lines.
Two active-low and one active-high enable inputs
reduce the need for external gates or inverters
when expanding. A 24-line decoder can be
implemented without external inverters and a
32-line decoder requires only one inverter. An
enable input can be used as a data input for
demultiplexing applications.
The SN54ALS138 and SN54AS138 are characterized for operation over the full military temperature range of
–55
°C to 125°C. The SN74ALS138A and SN74AS138 are characterized for operation from 0°C to 70°C.
logic symbols (alternatives)
G
7
0
2
&
DMUX
BIN/OCT
EN
&
Y7
7
Y6
9
6
Y5
10
5
Y4
11
4
Y3
12
3
Y2
13
2
Y1
14
1
Y0
15
0
4
2
1
5
OE2B
4
OE2A
6
OE1
3
C
2
B
A
1
7
6
5
4
3
2
1
0
Y7
7
Y6
9
Y5
10
Y4
11
Y3
12
Y2
13
Y1
14
Y0
15
5
OE2B
4
OE2A
6
OE1
3
C
2
B
A
1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A
B
C
OE2A
OE2B
OE1
Y7
GND
VCC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
(TOP VIEW)
SN54ALS138, SN54AS138 ...J PACKAGE
SN74ALS138A, SN74AS138 ...D OR N PACKAGE
3
2
1 20 19
910 11 12 13
4
5
6
7
8
18
17
16
15
14
Y1
Y2
NC
Y3
Y4
C
OE2A
NC
OE2B
OEI
SN54ALS138, SN54AS138 . . . FK PACKAGE
(TOP VIEW)
B
A
NC
Y5
Y0
Y7
GND
NC
NC – No internal connection
CC
V
Y6
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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