參數(shù)資料
型號: SN74ALS29843DW
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: ALS SERIES, 9-BIT DRIVER, TRUE OUTPUT, PDSO24
封裝: PLASTIC, SO-24
文件頁數(shù): 1/9頁
文件大?。?/td> 58K
代理商: SN74ALS29843DW
SN54ALS29843, SN74ALS29843, SN74ALS29844
9-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS151A – D2910 — JUNE 1988 — REVISED JANUARY 1990
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Copyright
1990, Texas Instruments Incorporated
1
PRODUCTION DATA information is current as
of publication date. Products conform to
specifications
per
the
terms
of
Texas
Instruments standard warranty. Production
processing does not necessarily include
testing of all parameters.
3-State Buffer-Type Outputs Drive Bus
Lines Directly
Bus-Structured Pinout
Provide Extra Bus Driving Latches
Necessary For Wider Address/Data Paths
or Buses With Parity
Buffered Control Inputs to Reduce DC
Loading
Power-Up High-Impedance
Package Options Include Plastic “Small
Outline” Packages and Standard Plastic
and Ceramic 300-Mil DIPs
description
These 9-bit latches feature three-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
The nine latches are transparent D-type. The
′ALS29843 has noninverting data (D) inputs. The
′ALS29844 has inverting D inputs.
A buffered output control (OC) input can be used
to place the nine outputs in either a normal logic
state (high or low levels) or a high-impedance
state. The outputs are also in the high-impedance
state
during
power-up
and
power-down
conditions.
The
outputs
remain
in
the
high-impedance
state
while
the
device
is
powered-down. In the high-impedance state, the
outputs neither load nor drive the bus lines
significantly. The high-impedance state and
increased drive provide the capability to drive the
bus lines in a bus-organized system without need
for interface or pullup components.
The output control (OC) does not affect the internal operation of the latches. Old data can be retained or new
data can be entered while the outputs are off.
The SN54ALS29843 is characterized for operation over the full military range of – 55
°C to 125°C. The
SN74ALS29843 and SN74ALS29844 are characterized for operation from 0
°C to 70°C.
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OC
1D
2D
3D
4D
5D
6D
7D
8D
9D
CLR
GND
VCC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
9Q
PRE
C
SN54ALS29843 . . . JT Package
SN74ALS29843 . . . DW or NT Package
(Top View)
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OC
1D
2D
3D
4D
5D
6D
7D
8D
9D
CLR
GND
VCC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
9Q
PRE
C
SN74ALS29844 . . . DW or NT Package
(Top View)
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SN74ALS29854DWE4 功能描述:總線收發(fā)器 8 to 9-Bit Parity 總線收發(fā)器 RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel