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參數(shù)資料
| 型號： | SN54ALS1002AFK |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | QUADRUPLE 2-INPUT POSITIVE-NOR BUFFERS |
| 中文描述： | 四2輸入陽性的NOR緩沖器 |
| 文件頁數(shù)： | 1/3頁 |
| 文件大?。?/td> | 43K |
| 代理商： | SN54ALS1002AFK |
SN54ALS1002A, SN74ALS1002A
QUADRUPLE 2-INPUT POSITIVE-NOR BUFFERS
SDAS238 – D2661, DECEMBER 1983 – REVISED MAY 1986
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77001
Copyright
1986, Texas Instruments Incorporated
5BASIC
1
Quad Versions of ’ALS805A
Buffer Version of ’ALS02
Package Options Include Plastic Small
Outline Packages, Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mil
DIPs
Dependable Texas Instruments Quality and
Reliability
description
These devices contain four independent 2-input
NOR buffers. They perform the Boolean functions
Y = A + B or Y = A
B in positive logic.
The SN54ALS1002A is characterized for opera-
tion over the full military temperature range of
–55
°
C to 125
°
C. The SN74ALS1002A is
characterized for operation from 0
°
C to 70
°
C.
FUNCTION TABLE
(each gate)
INPUTS
A
B
H
X
X
H
L
L
OUTPUT
Y
L
L
H
logic symbol
2
1A
1B
3
2A
2B
3A
3B
5
6
8
9
4A
4B
11
12
11Y
2Y
4
3Y
10
4Y
13
≥
1
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for D, J, and N packages.
1A
1B
1Y
2Y
2B
2A
3Y
3B
3A
4Y
4B
4A
logic diagram (positive logic)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1Y
1A
1B
2Y
2A
2B
GND
V
CC
4Y
4B
4A
3Y
3B
3A
SN54ALS1002A . . . J PACKAGE
SN74ALS1002A . . . D OR N PACKAGE
(TOP VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
4B
NC
4A
NC
3Y
1B
NC
2Y
NC
2A
SN54ALS1002A . . . FK PACKAGE
(TOP VIEW)
1
1
N
3
4
2
G
N
NC – No internal connection
C
V
3
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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