參數(shù)資料
型號: SN54ACT74FK
廠商: Texas Instruments, Inc.
元件分類: 通用總線功能
英文描述: DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
中文描述: 雙上升沿觸發(fā)的,有清除和預設功能的D型觸發(fā)器
文件頁數(shù): 1/6頁
文件大?。?/td> 86K
代理商: SN54ACT74FK
SN54ACT74, SN74ACT74
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLEAR AND PRESET
SCAS520E – AUGUST 1995 – REVISED JANUARY 2000
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Inputs Are TTL-Voltage Compatible
EPIC
(Enhanced-Performance Implanted
CMOS) 1-
μ
m Process
Package Options Include Plastic
Small-Outline (DW) Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK) and
Flatpacks (W), and Standard Plastic (N) and
Ceramic (J) DIPs
description
The ’ACT74 dual positive-edge-triggered devices
are D-type flip-flops.
A low level at the preset (PRE) or clear (CLR) input
sets or resets the outputs, regardless of the levels
of the other inputs. When PRE and CLR are
inactive (high), data at the data (D) input meeting
the setup-time requirements is transferred to the
outputs on the positive-going edge of the clock
pulse. Clock triggering occurs at a voltage level
and is not directly related to the rise time of the
clock pulse. Following the hold-time interval, data
at D can be changed without affecting the levels
at the outputs.
The SN54ACT74 is characterized for operation
over the full military temperature range of –55
°
C
to 125
°
C. The SN74ACT74 is characterized for
operation from –40
°
C to 85
°
C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUTS
PRE
CLR
CLK
D
Q
Q
L
H
X
X
H
L
H
L
X
X
L
H
H
L
L
X
L
X
H
H
H
H
H
L
H
H
L
L
H
H
H
X
Q0
Q0
This configuration is unstable; that is, it does not
persist when either PRE or CLR returns to its
inactive (high) level.
Copyright
2000, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
EPIC is a trademark of Texas Instruments Incorporated.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1CLR
1D
1CLK
1PRE
1Q
1Q
GND
V
CC
2CLR
2D
2CLK
2PRE
2Q
2Q
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
2D
NC
2CLK
NC
2PRE
1CLK
NC
1PRE
NC
1Q
SN54ACT74 . . . FK PACKAGE
(TOP VIEW)
1
N
1
2
2
V
2
1
G
N
C
SN54ACT74 . . . J OR W PACKAGE
SN74ACT74 . . . D, DB, N, OR PW PACKAGE
(TOP VIEW)
NC – No internal connection
相關PDF資料
PDF描述
SN54ACT74J DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
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