參數(shù)資料
型號: SN74ACT7808PM
廠商: Texas Instruments, Inc.
英文描述: Low-Voltage CMOS Dual D-Type Flip-Flop; Package: SOIC 14 LEAD; No of Pins: 14; Container: Rail; Qty per Container: 55
中文描述: 2048】9選通先入先出存儲器
文件頁數(shù): 1/14頁
文件大?。?/td> 183K
代理商: SN74ACT7808PM
SN74ACT7808
2048
×
9 STROBED FIRST-IN, FIRST-OUT MEMORY
SCAS205D – FEBRUARY 1991 – REVISED APRIL 1998
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Load Clocks and Unload Clocks Can Be
Asynchronous or Coincident
2048 Words by 9 Bits
Low-Power Advanced CMOS Technology
Fast Access Times of 15 ns With a 50-pF
Load
Programmable Almost-Full/Almost-Empty
Flag
Expansion Logic for Depth Cascading
Empty, Full, and Half-Full Flags
Fall-Through Time of 20 ns Typical
Data Rates up to 50 MHz
3-State Outputs
Package Options Include 44-Pin Plastic
Leaded Chip Carrier (FN), 64-Pin Thin Quad
Flat (PM), and Reduced-Height 64-Pin Quad
Flat (PAG) Packages
description
A FIFO memory is a storage device that allows data to be written into and read from its array at independent
data rates. The SN74ACT7808 is a 2048-word by 9-bit FIFO designed for high speed and fast access times.
It processes data at rates up to 50 MHz and access times of 15 ns in a bit-parallel format.
Data is written into memory on a low-to-high transition at the load-clock (LDCK) input and is read out on a
low-to-high transition at the unload-clock (UNCK) input. The memory is full when the number of words clocked
in exceeds the number of words clocked out by 2048. When the memory is full, LDCK signals have no effect
on the data residing in memory. When the memory is empty, UNCK signals have no effect.
Status of the FIFO memory is monitored by the full (FULL), empty (EMPTY), half-full (HF), and
almost-full/almost-empty (AF/AE) flags. The FULL output is low when the memory is full and high when the
memory is not full. The EMPTY output is low when the memory is empty and high when it is not empty. The HF
output is high when the FIFO contains 1024 or more words and is low when it contains 1023 or fewer words.
The AF/AE status flag is a programmable flag. The first one or two low-to-high transitions of LDCK after reset
can be used to program the almost-empty offset value (X) and the almost-full offset value (Y) if program enable
(PEN) is low. The AF/AE flag is high when the FIFO contains X or fewer words or (2048 – Y) or more words.
The AF/AE flag is low when the FIFO contains between (X + 1) and (2047 – Y) words.
A low level on the reset (RESET) input resets the internal stack pointers and sets FULL high, AF/AE high, HF
low, and EMPTY low. The Q outputs are not reset to any specific logic level.
The first word loaded into empty memory causes EMPTY to go high and the data to appear on the Q outputs.
It is important to note that the first word does not have to be unloaded. Data outputs are noninverting with respect
to the data inputs and are in the high-impedance state when the output-enable (OE) input is low. OE does not
affect the output flags.
Cascading is easily accomplished in the word-width and word-depth directions. When not using the FIFO in
depth expansion, cascade enable (CASEN) must be tied high.
The FIFO must be reset upon power up.
The SN74ACT7808 is characterized for operation from 0
°
C to 70
°
C.
Copyright
1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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參數(shù)描述
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SN74ACT7811-18FN 功能描述:IC SYNC FIFO MEM 1024X18 68-PLCC RoHS:是 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:74ACT 標準包裝:15 系列:74F 功能:異步 存儲容量:256(64 x 4) 數(shù)據(jù)速率:- 訪問時間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:24-DIP(0.300",7.62mm) 供應(yīng)商設(shè)備封裝:24-PDIP 包裝:管件 其它名稱:74F433
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