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參數(shù)資料
| 型號： | SN54ACT533 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Octal D-type Transparent Latches With 3-State Outputs(八D鎖存器(三態(tài)反相輸出)) |
| 中文描述： | 八路D型透明鎖存器與三態(tài)輸出（八?鎖存器（三態(tài)反相輸出）） |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 144K |
| 代理商： | SN54ACT533 |
SN54ACT533, SN74ACT533
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCAS553A – NOVEMBER 1995 – REVISED MAY 1996
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Inputs Are TTL-Voltage Compatible
3-State Inverting Outputs Drive Bus Lines
Directly
EPIC
(Enhanced-Performance Implanted
CMOS) 1-
μ
m Process
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW),
Ceramic Chip Carriers (FK) and
Flatpacks (W), and Standard Plastic (N) and
Ceramic (J) DIPs
description
The ’ACT533 are octal transparent D-type latches
with 3-state outputs. When the latch-enable (LE)
input is high, the Q outputs follow the
complements of the data (D) inputs. When LE is
taken low, the Q outputs are latched at the
inverted levels set up at the D inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low logic levels) or a high-
impedance state. In the high-impedance state,
the outputs neither load nor drive the bus lines
significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines without need for interface or pullup
components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
The SN54ACT533 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C. The
SN74ACT533 is characterized for operation from –40
°
C to 85
°
C.
FUNCTION TABLE
(each latch)
INPUTS
LE
OUTPUT
Q
OE
D
L
H
H
L
L
H
L
H
L
L
X
Q0
Z
H
X
X
Copyright
1996, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
EPIC is a trademark of Texas Instruments Incorporated.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
LE
SN54ACT533 . . . J OR W PACKAGE
SN74ACT533 . . . DB, DW, N, OR PW PACKAGE
(TOP VIEW)
3
2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
8D
7D
7Q
6Q
6D
2D
2Q
3Q
3D
4D
SN54ACT533 . . . FK PACKAGE
(TOP VIEW)
1
1
O
5
5
8
4
G
L
V
C
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN54ACT534 | Octal Edge-Triggered D-type Flip-Flops With 3-State Outputs(八上升沿D觸發(fā)器(三態(tài)反相輸出)) |
| SN54ACT563 | Octal D-type Transparent Latches With 3-State Outputs(八D鎖存器(三態(tài)同相輸出)) |
| SN54ACT564 | Octal Edge-Triggered D-type Flip-Flops With 3-State Outputs(八上升沿D觸發(fā)器(三態(tài)反相輸出)) |
| SN54ACT574 | Octal Edge-Triggered D-type Flip-Flops With 3-State Outputs(八上升沿D觸發(fā)器(三態(tài)同相輸出)) |
| SN54ACT7811GB | 1024 】 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN54ACT533FK | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SN54ACT533J | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SN54ACT533W | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SN54ACT534 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54ACT534FK | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
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