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| 型號： | SN54ABTH162460WD |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | 4-TO-1 MULTIPLEXED/DEMULTIPLEXED REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS |
| 中文描述： | 4比1復用/解復用收發(fā)登記，3態(tài)輸出 |
| 文件頁數(shù)： | 7/10頁 |
| 文件大小： | 176K |
| 代理商： | SN54ABTH162460WD |
SN54ABTH162460, SN74ABTH162460
4-TO-1 MULTIPLEXED/DEMULTIPLEXED REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS241E – FEBRUARY 1993 – REVISED MAY 1997
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)(see Figure 1)
VCC = 5 V,
TA = 25
°
C
MIN
SN54ABTH162460
SN74ABTH162460
UNIT
MAX
MIN
MAX
MIN
MAX
fclock
Clock frequency
0
160
0
160
0
160
MHz
CLKAB high or low
3.8
3.8
3.8
P l
Pulse
duration
CLKBA high or low
4.5
4.5
4.5
tw
LEAB1, 2, 3, or 4 high
2.8
2.8
2.8
ns
LEBA high
2.8
2.8
2.8
LEB1, 2, 3, or 4 high
3
3
3
A bus
2.5
2.5
2.5
Before CLKAB
↑
CE_SEL0/1
3.2
3.2
3.2
CLKENAB
3.2
3.2
3.2
Before LEAB1, 2, 3, or 4
↓
A bus
3.6
3.6
3.6
B bus
3.8
3.8
3.8
CLKENB
2.3
2.3
2.3
tsu
Setup time
Before CLKBA
↑
CLKENBA
2.5
2.5
2.5
ns
LEB1, 2, 3, or 4
4.3
4.3
4.3
SEL0/1
4.5
4.5
4.5
Before LEB1, 2, 3, or 4
↓
B bus
3.2
3.2
3.2
B bus
4
4
4
Before LEBA
↓
LEB1, 2, 3, or 4
4.4
4.4
4.4
SEL0/1
4.3
4.3
4.3
A bus
0.5
0.5
0.5
After CLKAB
↑
CE_SEL0/1
1.1
1.1
1.1
CLKENAB
0.5
0.5
0.5
After LEAB1, 2, 3, or 4
↓
A bus
1.2
1.2
1.2
B bus
1.3
1.3
1.3
th
Hold time
After CLKBA
↑
CLKENB
1
1
1
ns
CLKENBA
1
1
1
SEL0/1
0
0
0
After LEB1, 2, 3, or 4
↓
B bus
1.5
1.5
1.5
After LEBA
↓
B bus
SEL0/1
0.4
0.1
0.4
0.1
0.4
0.1
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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