- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378698 > SM5901AF (Seiko NPC Corporation) compression and non compression type anti-shock memory controller with built-in 1M DRAM PDF資料下載
參數(shù)資料
| 型號： | SM5901AF |
| 廠商： | Seiko NPC Corporation |
| 英文描述： | compression and non compression type anti-shock memory controller with built-in 1M DRAM |
| 中文描述： | 壓縮和非壓縮型抗休克，內(nèi)置100萬DRAM內(nèi)存控制器 |
| 文件頁數(shù)： | 21/31頁 |
| 文件大?。?/td> | 154K |
| 代理商： | SM5901AF |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁當(dāng)前第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁
SM5901AF
pemnr
13.3ms
VWA latch set
WAQV set
VWA(x)
VWA(x + 1)
YBLKCK
Microcontroller data set
Refer to Microcontroller interface
VWA
Values shown are for rate fs. The values are 1/2 those shown at rate 2fs.
The VWA is determined according to the YBLKCK
pin and WAQV command. Refer to the timing chart
below.
1.YBLKCK is a 75 Hz clock(HIGH) when used for
normal read mode and it is a 150Hz clock when
used for double-speed read mode. Both modes
clock are synchronized to the CD format block end
timing.
When this clock goes LOW, WA which is the write
address of internal encode sequence, is stored
(see note 2).
2.The microcontroller checks the subcode and, if
confirmed to be correct, generates a WAQV com-
mand (80H).
3.When the WAQV command is received, VWA is
updated according to the previously latched WA.
(note 2) Actually, there is a small time difference, or
gap, between the input data and YBLKCK. This gap
serves to preserves the preceding WA to protect
against incorrect operation.
RAM addresses
SM5901 has an 1M DRAM as the internal buffer.
and an external 1M DRAM can be also connected
to expand the memory to 2M bits.
Three kinds of addresses are used for external
RAM control.
WA (write address)
RA (read address)
VWA (valid write address)
Among these, VWA is the write address for con-
forming data whose validity has been confirmed.
Determination of the correctness of data read from
the CD is delayed relative to the encode write pro-
cessing, so VWA is always delayed relative to WA.
The region available for valid data is the area
between VWA-RA.
- Connect data work area
This is an area of memory reserved for connect
data. This area is 2Kbits.
Fig1. RAM addresses
RA
WA
VWA
Valid data
area
Connect data work area
VWA (valid write address)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SM5902 | compression and non compression type shock-proof memory controller |
| SM5902AF | compression and non compression type shock-proof memory controller |
| SM5903BF | compression and non compression type shock-proof memory controller |
| SM5903CF | compression and non compression type anti-shock memory controller |
| SM5904BF | compression and non compression type shock-proof memory controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SM5902 | 制造商:NPC 制造商全稱:Nippon Precision Circuits Inc 功能描述:compression and non compression type shock-proof memory controller |
| SM5902AF | 制造商:NPC 制造商全稱:Nippon Precision Circuits Inc 功能描述:compression and non compression type shock-proof memory controller |
| SM5903BF | 制造商:NPC 制造商全稱:Nippon Precision Circuits Inc 功能描述:compression and non compression type shock-proof memory controller |
| SM5903BF_00 | 制造商:NPC 制造商全稱:Nippon Precision Circuits Inc 功能描述:compression and non compression type shock-proof memory controller |
| SM5903CF | 制造商:NPC 制造商全稱:Nippon Precision Circuits Inc 功能描述:compression and non compression type anti-shock memory controller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。