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參數(shù)資料
| 型號(hào)： | SLES003A |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | USB Streaming Controller |
| 中文描述： | USB流控制器 |
| 文件頁(yè)數(shù)： | 7/114頁(yè) |
| 文件大小： | 493K |
| 代理商： | SLES003A |
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1
–
1
1 Introduction
The TAS1020A integrated circuit (IC) is a universal serial bus (USB) peripheral interface device designed specifically
for applications that require isochronous data streaming. Applications include digital speakers, which require the
streaming of digital audio data between the host PC and the speaker system via the USB connection. The TAS1020A
device is fully compatible with the USB Specification Version 1.1 and the USB Audio Class Specification.
The TAS1020A uses a standard 8052 microcontroller unit (MCU) core with on-chip memory. The MCU memory
includes 8K bytes of program memory ROM that contains a boot loader program. At initialization, the boot loader
program downloads the application program code to a 6,016-byte RAM from either the host PC or a nonvolatile
memory on the printed-circuit board (PCB). The MCU handles all USB control, interrupt and bulk endpoint
transactions. DMA channels are provided to handle isochronous endpoint transactions.
The USB interface includes an integrated transceiver that supports 12 Mb/s (full speed) data transfers. In addition
to the USB control endpoint, support is provided for up to seven IN endpoints and seven OUT endpoints. The USB
endpoints are fully configurable by the MCU application code using a set of endpoint configuration blocks that reside
in on-chip RAM. All USB data transfer types are supported.
The TAS1020A device also includes a codec port interface (C-Port) that can be configured to support several industry
standard serial interface protocols. These protocols include the audio codec (AC)
’
97 Revision 1.X, the audio codec
(AC)
’
97 Revision 2.X and several inter-IC sound (I
2
S) modes.
A direct memory access (DMA) controller with two channels is provided for streaming the USB isochronous data
packets to/from the codec port interface. Each DMA channel can support one USB isochronous endpoint.
An on-chip phase lock loop (PLL) and adaptive clock generator (ACG) provide support for the USB synchronization
modes, which include asynchronous, synchronous and adaptive.
Other on-chip MCU peripherals include an inter-IC control (I
2
C) serial interface, and two 8-bit general-purpose
input/output (GPIO) ports.
The TAS1020A device is implemented in a 3.3-V 0.25
μ
m CMOS technology.
1.1
Features
Universal Serial Bus (USB)
USB specification version 1.1 compatible
USB audio class specification 1.0 compatible
Integrated USB transceiver
Supports 12 Mb/s data rate (full speed)
Supports suspend/resume and remote wake-up
Supports control, interrupt, bulk, and isochronous data transfer types
Supports up to a total of seven IN endpoints and seven OUT endpoints in addition to the control endpoint
Data transfer type, data buffer size, single or double buffering is programmable for each endpoint
On-chip adaptive clock generator (ACG) supports asynchronous, synchronous and adaptive
synchronization modes for isochronous endpoints
To support synchronization for streaming USB audio data, the ACG can be used to generate the master
clock for the codec
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