參數(shù)資料
型號(hào)： SL28647CLCT
廠商： SILICON LABORATORIES
元件分類： 時(shí)鐘產(chǎn)生/分配
英文描述： 400 MHz, PROC SPECIFIC CLOCK GENERATOR, QCC72
封裝： 10 X 10 MM, ROHS COMPLIANT, QFN-72
文件頁數(shù)： 25/27頁
文件大?。?/td> 269K
代理商： SL28647CLCT
SL28647
.......................Document #: 001-05103 Rev *B Page 7 of 27
0
SRC0_STP_CTRL
Allow control of SRC0 with assertion of PCI_STP# or SW PCI_STP
0 = Free running, 1 = Stopped with PCI_STP#
Byte 5 Control Register 5
Bit
@Pup
Name
Description
7
0
LCD_96/100M_PD_Drive_Mode LCD_96/100 PWRDWN Drive Mode
0 = Driven in PWRDWN, 1 = Tri-state
6
0
DOT96_PD_Drive_Mode
DOT96 PWRDWN Drive Mode
0 = Driven in PWRDWN, 1 = Tri-state
5
0
RESERVED
4
0
RESERVED
3
0
PCIF0_STP_CTRL
Allow control of PCIF0 with assertion of SW and HW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
2
1
CPU2_STP_CTRL
Allow control of CPU[T/C]2 with assertion of CPU_STP#
0 = Free running, 1 = Stopped with CPU_STP#
1
CPU1_STP_CTRL
Allow control of CPU[T/C]1 with assertion of CPU_STP#
0 = Free running, 1 = Stopped with CPU_STP#
0
1
CPU0_STP_CTRL
Allow control of CPU[T/C]0 with assertion of CPU_STP#
0 = Free running, 1 = Stopped with CPU_STP#
Byte 4 Control Register 4 (continued)
Bit
@Pup
Name
Description
Byte 6 Control Register 6
Bit
@Pup
Name
Description
7
0
SRC_STP_Drive_Mode
SRC Stop Drive Mode
0 = Driven when PCI_STP# asserted
1 = Tri-state when PCI_STP# asserted
6
0
CPU2_STP_Drive_Mode
CPU2 Stop Drive Mode
0 = Driven when CPU_STP# asserted
1 = Tri-state when CPU_STP# asserted
5
0
CPU1_STP_Drive_Mode
CPU1 Stop Drive Mode
0 = Driven when CPU_STP# asserted
1 = Tri-state when CPU_STP# asserted
4
0
CPU0_STP_Drive_Mode
CPU0 Stop Drive Mode
0 = Driven when CPU_STP# asserted
1 = Tri-state when CPU_STP# asserted
3
0
SRC_[9:1]_PD_Drive_Mode SRC[9:1] PWRDWN Drive Mode
0 = Driven when PD asserted
1 = Tri-state when PD asserted
2
0
CPU2_PD_Drive_Mode
CPU2 PWRDWN Drive Mode
0 = Driven when PD asserted
1 = Tri-state when PD asserted
1
0
CPU1_PD_Drive_Mode
CPU1 PWRDWN Drive Mode
0 = Driven when PD asserted
1 = Tri-state when PD asserted
0
CPU0_PD_Drive_Mode
CPU0 PWRDWN Drive Mode
0 = Driven when PD asserted
1 = Tri-state when PD asserted
Byte 7 Control Register 7
Bit
@Pup
Name
Description
7
0
TEST_SEL
REF/N or Tri-state Select
0 = Tri-state, 1 = REF/N Clock
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SL28748ELC 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Calpella IronLake Jasper Forest IbexPk RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
SL28748ELCT 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Calpella IronLake Jasper Forest IbexPk RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
SL28748ELCTR 制造商:Silicon Laboratories Inc 功能描述:
SL28748ELI 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Calpella IronLake Jasper Forest IbexPk RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
SL28748ELIT 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Calpella IronLake Jasper Forest IbexPk RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
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