參數(shù)資料
型號： SL28647CLCT
廠商： SILICON LABORATORIES
元件分類： 時鐘產(chǎn)生/分配
英文描述： 400 MHz, PROC SPECIFIC CLOCK GENERATOR, QCC72
封裝： 10 X 10 MM, ROHS COMPLIANT, QFN-72
文件頁數(shù)： 22/27頁
文件大?。?/td> 269K
代理商： SL28647CLCT
SL28647
.......................Document #: 001-05103 Rev *B Page 4 of 27
Data Protocol
The clock driver serial protocol accepts byte write, byte read,
block write, and block read operations from the controller. For
block write/read operation, the bytes must be accessed in
sequential order from lowest to highest byte (most significant
bit first) with the ability to stop after any complete byte has
been transferred. For byte write and byte read operations, the
system controller can access individually indexed bytes. The
offset of the indexed byte is encoded in the command code,
as described in Table 3.
The block write and block read protocol is outlined in Table 4
while Table 5 outlines the corresponding byte write and byte
read protocol. The slave receiver address is 11010010 (D2h)
Table 2. Frequency Select Table FSA, FSB, and FSC
FSC
FSB
FSA
CPU
SRC
PCIF/PCI
27MHz
REF
DOT96
USB
000
266 MHz
100 MHz
33 MHz
27 MHz
14.318 MHz
96 MHz
48 MHz
101
100 MHz
001
133 MHz
011
166 MHz
010
200 MHz
100
333 MHz
110
400 MHz
111
Reserved
Table 3. Command Code Definition
Bit
Description
7
0 = Block read or block write operation, 1 = Byte read or byte write operation
(6:0)
Byte offset for byte read or byte write operation. For block read or block write operations, these bits should be
'0000000'
Table 4. Block Read and Block Write Protocol
Block Write Protocol
Block Read Protocol
Bit
Description
Bit
Description
1Start
1
Start
8:2
Slave address–7 bits
8:2
Slave address–7 bits
9
Write
9
Write
10
Acknowledge from slave
10
Acknowledge from slave
18:11
Command Code–8 bits
18:11
Command Code–8 bits
19
Acknowledge from slave
19
Acknowledge from slave
27:20
Byte Count–8 bits
(Skip this step if I2C_EN bit set)
20
Repeat start
28
Acknowledge from slave
27:21
Slave address–7 bits
36:29
Data byte 1–8 bits
28
Read = 1
37
Acknowledge from slave
29
Acknowledge from slave
45:38
Data byte 2–8 bits
37:30
Byte Count from slave–8 bits
46
Acknowledge from slave
38
Acknowledge
....
Data Byte/Slave Acknowledges
46:39
Data byte 1 from slave–8 bits
....
Data Byte N–8 bits
47
Acknowledge
....
Acknowledge from slave
55:48
Data byte 2 from slave–8 bits
....
Stop
56
Acknowledge
....
Data bytes from slave/Acknowledge
....
Data Byte N from slave–8 bits
....
NOT Acknowledge
....
Stop
相關(guān)PDF資料
PDF描述
SL28779CLCT 133 MHz, PROC SPECIFIC CLOCK GENERATOR, QCC32
SL28PCIE26ALIT OTHER CLOCK GENERATOR, QCC32
SL28PCIE26ALI OTHER CLOCK GENERATOR, QCC32
SL28PCIE26ALC OTHER CLOCK GENERATOR, QCC32
SL28SRC01BZC OTHER CLOCK GENERATOR, PDSO16
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SL28748ELC 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Calpella IronLake Jasper Forest IbexPk RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
SL28748ELCT 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Calpella IronLake Jasper Forest IbexPk RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
SL28748ELCTR 制造商:Silicon Laboratories Inc 功能描述:
SL28748ELI 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Calpella IronLake Jasper Forest IbexPk RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
SL28748ELIT 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Calpella IronLake Jasper Forest IbexPk RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*