TDC SRC Duty Cycle Measured a" />
參數(shù)資料
型號: SL28506BZI-2T
廠商: Silicon Laboratories Inc
文件頁數(shù): 14/27頁
文件大?。?/td> 0K
描述: IC CLOCK CK505 PCIE GEN2 56TSSOP
標準包裝: 2,000
類型: 時鐘/頻率發(fā)生器
PLL:
主要目的: Intel CPU 服務器
輸入: 時鐘,晶體
輸出: HCSL,LVCMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:19
差分 - 輸入:輸出: 無/是
頻率 - 最大: 400MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 56-TFSOP(0.240",6.10mm 寬)
供應商設備封裝: 56-TSSOP
包裝: 帶卷 (TR)
SL28506-2
.......................DOC #: SP-AP-0021 (Rev AB) Page 21 of 27
TDC
SRC Duty Cycle
Measured at 0V differential
45
55
%
TPERIOD
100 MHz SRC Period
Measured at 0V differential at 0.1s
9.99900
10.0010
ns
TPERIODSS
100 MHz SRC Period, SSC
Measured at 0V differential at 0.1s
10.02406
10.02607
ns
TPERIODAbs
100 MHz SRC Absolute Period
Measured at 0V differential at 1 clock
9.87400
10.1260
ns
TPERIODSSAbs 100 MHz SRC Absolute Period, SSC
Measured at 0V differential at 1 clock
9.87406
10.1762
ns
TSKEW(window) Any SRC Clock Skew from the earliest
bank to the latest bank
Measured at 0V differential
–3.0
ns
TCCJ
SRC Cycle to Cycle Jitter
Measured at 0V differential
–125
ps
LACC
SRC Long Term Accuracy
Measured at 0V differential
–100
ppm
TR / TF
SRC Rising/Falling Slew Rate
Measured differentially from ±150 mV
2.5
8
V/ns
TRFM
Rise/Fall Matching
Measured single-endedly from ±75 mV
–20
%
VHIGH
Voltage High
1.15
V
VLOW
Voltage Low
–0.3
V
VOX
Crossing Point Voltage at 0.7V Swing
300
550
mV
DOT96 at 0.7V
TDC
DOT96 Duty Cycle
Measured at 0V differential
45
55
%
TPERIOD
DOT96 Period
Measured at 0V differential at 0.1s
10.4156
10.4177
ns
TPERIODAbs
DOT96 Absolute Period
Measured at 0V differential at 0.1s
10.1656
10.6677
ns
TCCJ
DOT96 Cycle to Cycle Jitter
Measured at 0V differential at 1 clock
–250
ps
LACC
DOT96 Long Term Accuracy
Measured at 0V differential at 1 clock
–100
ppm
TR / TF
DOT96 Rising/Falling Slew Rate
Measured differentially from ±150 mV
2.5
8
V/ns
TRFM
Rise/Fall Matching
Measured single-endedly from ±75 mV
–20
%
VHIGH
Voltage High
1.15
V
VLOW
Voltage Low
–0.3
V
VOX
Crossing Point Voltage at 0.7V Swing
300
550
mV
LCD_100_SSC at 0.7V
TDC
LCD_100 Duty Cycle
Measured at 0V differential
45
55
%
TPERIOD
100 MHz LCD_100 Period
Measured at 0V differential at 0.1s
9.99900
10.0010
ns
TPERIODSS
100 MHz LCD_100 Period, SSC -0.5% Measured at 0V differential at 0.1s
10.02406
10.02607
ns
TPERIODAbs
100 MHz LCD_100 Absolute Period
Measured at 0V differential at 1 clock
9.74900
10.25100
ns
TPERIODSSAbs 100 MHz LCD_100 Absolute Period,
SSC
Measured at 0V differential at 1 clock
9.74906
10.3012
ns
TCCJ
LCD_100 Cycle to Cycle Jitter
Measured at 0V differential
–250
ps
LACC
LCD_100 Long Term Accuracy
Measured at 0V differential
–100
ppm
TR / TF
LCD_100 Rising/Falling Slew Rate
Measured differentially from ±150 mV
2.5
8
V/ns
TRFM
Rise/Fall Matching
Measured single-endedly from ±75 mV
–20
%
VHIGH
Voltage High
1.15
V
VLOW
Voltage Low
–0.3
V
VOX
Crossing Point Voltage at 0.7V Swing
300
550
mV
PCI/PCIF at 3.3V
TDC
PCI Duty Cycle
Measurement at 1.5V
45
55
%
TPERIOD
Spread Disabled PCIF/PCI Period
Measurement at 1.5V
29.99700
30.00300
ns
TPERIODSS
Spread Enabled PCIF/PCI Period
Measurement at 1.5V
30.08421
30.23459
ns
TPERIODAbs
Spread Disabled PCIF/PCI Period
Measurement at 1.5V
29.49700
30.50300
ns
AC Electrical Specifications (continued)
Parameter
Description
Condition
Min.
Max.
Unit
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