參數(shù)資料
型號(hào): Si9182
廠商: Vishay Intertechnology,Inc.
英文描述: Micropower 250-mA CMOS LDO Regulator With Error Flag/Power-On-Reset(250mA微功耗CMOS低壓差穩(wěn)壓器(帶電源錯(cuò)誤標(biāo)記和加電復(fù)位))
中文描述: 微250毫安的CMOS LDO穩(wěn)壓器在錯(cuò)誤旗/上電復(fù)位(250mA的微功耗的CMOS低壓差穩(wěn)壓器(帶電源錯(cuò)誤標(biāo)記和加電復(fù)位))
文件頁數(shù): 4/10頁
文件大?。?/td> 115K
代理商: SI9182
Si9182
Vishay Siliconix
New Product
www.vishay.com FaxBack 408-970-5600
4
Document Number: 71150
S-01484
Rev. B, 03-Jul-00
V
IN
0.95 V
NOM
V
OUT
ERROR
V
NOM
t
DELAY
FIGURE 4.
Timing Diagram for Power-Up
t
ON
5
C
NOISE
SD
GND
SENSE or ADJ
V
IN
V
OUT
MSOP-8
6
7
8
2
3
4
1
Top View
DELAY
ERROR
Pin Number
Name
Function
1
C
NOISE
Noise bypass pin. For low noise applications, a 0.01- F or larger ceramic capacitor should be connected from this pin
to ground.
2
DELAY
Capacitor connected from this pin to ground will allow a delayed power-on-reset signal at the ERROR (Pin 7) output.
Refer to Figure 4.
3
GND
Ground pin. Local ground for C
NOISE
and C
OUT
.
4
V
IN
Input supply pin. Bypass this pin with a 2.2- F ceramic or tantalum capacitor to ground.
5
V
OUT
Output voltage. Connect C
OUT
between this pin and ground.
6
SENSE or ADJ
For fixed output voltage versions, this pin should be connected to V
(Pin 5). For adjustable output voltage version,
this voltage feedback pin sets the output voltage via an external resistor divider.
7
ERROR
This open drain output is an error flag output which goes low when V
drops 5% below its nominal voltage. This pin
also provides a power-on-reset signal if a capacitor is connected to the DELAY pin.
8
SD
By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to V
IN
if unused.
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