參數(shù)資料
型號(hào)： SI5367C-C-GQ
廠(chǎng)商： Silicon Laboratories Inc
文件頁(yè)數(shù)： 1/80頁(yè)
文件大?。?/td> 0K
描述： IC CLOCK MULTIPLIER PROG 100TQFP
標(biāo)準(zhǔn)包裝： 90
系列： DSPLL®
類(lèi)型： 時(shí)鐘乘法器
PLL： 是
輸入： 時(shí)鐘
輸出： CML，CMOS，LVDS，LVPECL
電路數(shù)： 1
比率 - 輸入:輸出： 4:5
差分 - 輸入:輸出： 是/是
頻率 - 最大： 346MHz
除法器/乘法器： 無(wú)/是
電源電壓： 1.71 V ~ 2.75 V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 100-TQFP
供應(yīng)商設(shè)備封裝： 100-TQFP（14x14）
包裝： 托盤(pán)
Rev. 0.5 2/12
Copyright 2012 by Silicon Laboratories
Si5367
P-P ROGRAMMABLE P RECISION C LOCK M ULTIPLIER
Features
Applications
Description
The Si5367 is a low jitter, precision clock multiplier for applications requiring clock
multiplication without jitter attenuation. The Si5367 accepts four clock inputs
ranging from 10 to 707 MHz and generates five frequency-multiplied clock outputs
ranging from 2 kHz to 945 MHz and select frequencies to 1.4 GHz. The device
provides virtually any frequency translation combination across this operating
range. The outputs are divided down separately from a common source. The
Si5367 input clock frequency and clock multiplication ratio are programmable
through an I2C or SPI interface. The Si5367 is based on Silicon Laboratories' 3rd-
generation DSPLL technology, which provides any-frequency synthesis in a
highly integrated PLL solution that eliminates the need for external VCXO and
loop filter components. The DSPLL loop bandwidth is digitally programmable,
providing jitter performance optimization at the application level. Operating from a
single 1.8, 2.5, or 3.5 V supply, the Si5367 is ideal for providing clock
multiplication in high performance timing applications.
Not recommended for new
designs. For alternatives, see the
Si533x family of products.
Generates any frequency from
2 kHz to 945 MHz and select
frequencies to 1.4 GHz from an
input frequency of 10 to 710 MHz
Low jitter clock outputs w/jitter
generation as low as 0.6 ps rms
(50 kHz–80 MHz)
Integrated loop filter with
selectable loop bandwidth
(150 kHz to 1.3 MHz)
Four clock inputs with manual or
automatically controlled
switching
Five clock outputs with selectable
signal format (LVPECL, LVDS,
CML, CMOS)
Support for ITU G.709 FEC ratios
(255/238, 255/237, 255/236)
LOS alarm outputs
I2C or SPI programmable
settings
On-chip voltage regulator for
1.8 V ±5%, 2.5 V ±10%, or
3.5 V ±10% operation
Small size: 14 x 14 mm 100-pin
TQFP
Pb-free, RoHS compliant
SONET/SDH OC-48/OC-192 STM-
16/STM-64 line cards
GbE/10GbE, 1/2/4/8/10GFC line
cards
ITU G.709 and custom FEC line
cards
Wireless base stations
Data converter clocking
xDSL
SONET/SDH + PDH clock synthesis
Test and measurement
Ordering Information:
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SI5367C-C-GQR 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 mP-Program Precision Clk Multiplier 4/5 RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
SI5367-EVB 制造商:Silicon Laboratories Inc 功能描述:
SI5368 制造商:SILABS 制造商全稱(chēng):SILABS 功能描述:ANY-RATE PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR
Si5368A-B-GQ 功能描述:鎖相環(huán) - PLL ANY-RATE CLK MULT JITTER ATTEN 5 OUTS RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
SI5368A-B-GQR 制造商:Silicon Laboratories Inc 功能描述:
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