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參數(shù)資料
| 型號： | SI3012-KS |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 25/64頁 |
| 文件大小： | 0K |
| 描述： | IC LINE-SIDE DAA 16SOIC |
| 標(biāo)準(zhǔn)包裝： | 48 |
| 系列： | ISOcap™ |
| 數(shù)據(jù)格式： | V.90 |
| 電源電壓： | 3.3 V ~ 5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC N |
| 包裝： | 管件 |
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Si3038
Rev. 2.01
31
Figure 27. Si3038 Connection To AC’97 Controller (Primary Device Configuration)
AC-Link Digital Serial Interface Protocol
The Si3024 incorporates a 5-pin digital serial interface
that links it to the AC’97 controller. AC-link is a bi-
directional, fixed rate, serial PCM digital stream. It
handles multiple input and output audio streams
(including modems), as well as control register
accesses employing a TDM scheme. The AC-link
architecture divides each audio frame into 12 outgoing
and 12 incoming data streams, each with 20-bit sample
resolution. The Si3024 data streams are as follows:
Control—Control register write port; two output slots
Status—Control register read port; two input slots
Modem Line Codec Output—Modem line codec
DAC input stream; one output slot per line
Modem Line Codec Input—Modem line codec ADC
output stream; one input slot per line
I/O Control—DAA control and GPIO; one output slot
I/O Status—DAA status and GPIO; one input slot
Synchronization of all AC-link data transactions is
signaled by the AC’97 controller. The Si3024 drives the
serial bit clock onto AC-link, which the AC’97 controller
then qualifies with a synchronization signal to construct
audio frames.
The SYNC signal, fixed at 48 kHz, is derived by dividing
down the serial bit clock (BIT_CLK). BIT_CLK, fixed at
12.288 MHz,
provides
the
necessary
clocking
granularity to support 12 20-bit outgoing and incoming
time slots. AC-link serial data is transitioned on each
rising edge of BIT_CLK. The receiver of AC-link data,
the Si3024 for outgoing data and the AC’97 controller
for incoming data, samples each serial bit on the falling
edges of BIT_CLK.
Figure 28. Standard Bi-Directional Audio Frame
Digital
AC'97
Controller
Si3024
SYNC
BIT_CLK
SDATA_OUT
SDATA_IN
RESET
Slot #
SDATA_OUT
SYNC
0
1
2
3
4
5
6
7
8
9
10
11
12
SDATA_IN
Tag
Status
ADDR
Status
DATA
PCM
L
PCM
R
Line 1
ADC
MIC
ADC
RSRVD
Line 2
ADC
HSET
ADC
IO
STATUS
RSRVD
PCM L
(n+1)
PCM R
(n+1)
PCM C
(n+1)
Tag
CMD
ADDR
CMD
DATA
PCM
L
PCM
R
Line 1
DAC
PCM
Center
PCM
L SURR
PCM
R SURR
PCM
LFE
Line 2
DAC
HSET
DAC
IO
CTRL
Codec ID
SLOTREQ 3-12
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| SI3063-F-FS | IC DAA ENH GLOB LINE-SIDE 16SOIC |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SI3012-KSR | 制造商:Silicon Laboratories Inc 功能描述: |
| SI-3012KS-TL | 制造商:Sanken Electric Co Ltd 功能描述:IC REG LDO ADJ 1A 8SOIC |
| SI3012-KT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GLOBAL MC 97 SILICON DAA |
| SI-3012LU | 制造商:SANKEN 制造商全稱:Sanken electric 功能描述:Surface-Mount, Low Current Consumption, Low Dropout Voltage Dropper Type |
| SI-3012LU-TL | 制造商:Sanken Electric Co Ltd 功能描述:IC REG LDO ADJ 0.25A SOT89-5 |
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