Reset settings = 0000_0000b (0x00) SE4 (CF5). Chip Functions " />
參數(shù)資料
型號(hào): SI2400-FS
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 64/94頁(yè)
文件大?。?/td> 0K
描述: IC ISOMODEM SYST-SIDE DAA 16SOIC
標(biāo)準(zhǔn)包裝: 48
系列: ISOmodem®
數(shù)據(jù)格式: V.21,V.22,V.23,Bell 103,Bell 212A
波特率: 2.4k
電源電壓: 3 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC N
包裝: 管件
配用: 336-1166-ND - BOARD EVAL FOR SI2400 ISOMODEM
Si2400
Rev. 1.3
67
Reset settings = 0000_0000b (0x00)
SE4 (CF5). Chip Functions 5
Bit
D7D6D5D4D3
D2
D1
D0
Name
NBCK
SBCK
DRT
GPE
APO
TRSP
Type
R
R/W
Bit
Name
Function
7NBCK
9600 Baud Clock (Read Only).
6
SBCK
600 Baud Clock (Read Only).
5:4
DRT
Data Routing (See Figure 10).
00 = Data mode, DSP output transmitted to line, line received by DSP input.
01 = Voice mode, selected AIN transmitted to line, line received by AOUT.
10 = Loopback mode, RXD through microcontroller (DSP) to TXD. AIN looped to AOUT.
11 = Codec mode, data from DSPOUT to AOUT, AIN to DSPIN.
3
GPE*
GPIO1 Enable.
0 = Disable.
1 = Enable GPIO1 to be HDLC end-of-frame flag.
2
Reserved
Read returns zero.
1
APO
Analog Power On.
0 = Disable.
1 = Power on analog ADC and DAC.
0TRSP*
TXD2/RXD2 Serial Port.
0 = Disable.
1 = Enable TXD2/RXD2 serial port so that RXD2 is GPIO1 and TXD2 is GPIO2.
*Note: GPE and TRSP are mutually exclusive. Only one can be set at any one time, and they override the settings in registers
GPIO2 and GPIO1. Once TXD2 and RXD2 are enabled through TRSP
= 1b, the primary serial port TXD and RXD no
longer function and pins TXD2 and RXD2 control the Si2400. This feature allows a second microcontroller to control
the Si2400.
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