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參數(shù)資料
| 型號(hào)： | SI2400-FS |
| 廠商： | Silicon Laboratories Inc |
| 文件頁(yè)數(shù)： | 35/94頁(yè) |
| 文件大小： | 0K |
| 描述： | IC ISOMODEM SYST-SIDE DAA 16SOIC |
| 標(biāo)準(zhǔn)包裝： | 48 |
| 系列： | ISOmodem® |
| 數(shù)據(jù)格式： | V.21，V.22，V.23，Bell 103，Bell 212A |
| 波特率： | 2.4k |
| 電源電壓： | 3 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC N |
| 包裝： | 管件 |
| 配用： | 336-1166-ND - BOARD EVAL FOR SI2400 ISOMODEM |
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Si2400
40
Rev. 1.3
7. Low Level DSP Control
Although not necessary for most applications, the DSP
low-level control functions are available for users with
very specific applications requiring direct DSP control.
7.1. DSP Registers
Several DSP registers are accessible through the
Si2400 microcontroller via S-registers SE5, SE6, SE7
and SE8. SE5 and SE6 are used as conduits to write
data to specific DSP registers and read status. SE8
defines the function of SE5 and SE6 depending on
whether they are being written to or read from. Care
must be exercised when writing to DSP registers. DSP
registers can only be written while the Si2400 is on-
hook and in the Command mode. Writing to any register
range values is likely to cause the DSP to exhibit
unpredictable behavior.
The DSP register address is 16-bits wide and the DSP
data field is 14-bits wide. DSP register addresses and
data are written in hexadecimal. To write a value to a
DSP register, the register address is written then the
data is written. When SE8 = 0x00, SE5(DADL) is written
with the low bits [7:0] of the DSP register address and
SE6 (DADH) is written with the high bits [15:8] of the
DSP address. When SE8 = 0x01, SE5 (DDL) is written
with the low bits [7:0] of the DSP data word
corresponding to the previously written address and
SE6 (DDH) is written with the high bits [15:8] of the data
word corresponding to the previously written address.
Example 1 below illustrates the proper procedure for
writing to DSP registers.
Example1:
The user would like to program call
progress filter coefficient A2_k0 (0x15) to be 309
(0x135).
Host
Command:
ATSE8=00SE6=00SE5=15SE8=01SE6=01SE5=35SE8=00
In the command above, ATSE8=00 sets up registers
SE5 and SE6 as DSP address registers. SE6=00 sets
the high bits of the address, and SE5=15 sets the low
bits. SE8=01 sets up registers SE5 and SE6 as DSP
data registers for the previously written DSP address
(0x15). SE6=01 sets the high 6 bits of the 14-bit data
word, and SE5=35 sets the low 8 bits of the 14-bit data
word.
Table 24. Low-Level DSP Parameters
DSP Reg. Addr.
Name
Description
Function
Default
(dec)
0x0002
XMTL
DAA modem full scale transmit level,
default = –10 dBm
Level = 20log10 (XTML/4096)
–10 dBm
4096
0x0003
DTML
DTMF high tone transmit level,
default = –5.5 dBm
Level = 20log10 (DTML/4868)
–5.5 dBm
4868
0x0004
DTMT
DTMF twist ratio (low/high), default = –2 dBm Level = 20log
10 (DTMT/3277) –
2dB
3277
0x0005
UFRQ User-defined transmit tone frequency. See
register SE5 (SE8=0x02 (Write Only))
f = (9600/512) UFRQ (Hz)
91
0x0006
CPDL
Call progress detect level (see Figure 13),
default = –43 dBm
Level = 20log10 (4096/CPDL)
–43 dBm
4096
0x0007
UDFD1 User-defined frequency detector 1. Center
frequency for detector 1.
UDFD1 = 8192 cos (2
π f/9600)
4987
0x0008
UDFD2 User-defined frequency detector 2. Center
frequency for detector 2.
UDFD2 = 8192 cos (2
π f/9600)
536
0x0009
UDFD3 User-defined frequency detector 3. Center
frequency for detector 3.
UDFD3 = 8192 cos (2
π f/9600)
4987
0x000A
UDFD4 User-defined frequency detector 4. Center
frequency for detector 4.
UDFD4 = 8192 cos (2
π f/9600)
536
0x000B
TGNL
Tone generation level associated with TONC
(SE5 (SE8 = 0x02) Write Only Definition),
default = –10 dBm
Level = 20log10 (TGNL/2896)
– 10 dBm
2896
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